1 use core::sync::atomic::{compiler_fence, Ordering}; 2 3 use log::debug; 4 use system_error::SystemError; 5 use x86::dtables::DescriptorTablePointer; 6 7 use crate::{ 8 arch::{interrupt::trap::arch_trap_init, process::table::TSSManager}, 9 driver::clocksource::acpi_pm::init_acpi_pm_clocksource, 10 init::init::start_kernel, 11 mm::{MemoryManagementArch, PhysAddr}, 12 }; 13 14 use super::{ 15 driver::{ 16 hpet::{hpet_init, hpet_instance}, 17 tsc::TSCManager, 18 }, 19 MMArch, 20 }; 21 22 #[derive(Debug)] 23 pub struct ArchBootParams {} 24 25 impl ArchBootParams { 26 pub const DEFAULT: Self = ArchBootParams {}; 27 } 28 29 extern "C" { 30 static mut GDT_Table: [usize; 0usize]; 31 static mut IDT_Table: [usize; 0usize]; 32 fn head_stack_start(); 33 34 fn multiboot2_init(mb2_info: u64, mb2_magic: u32) -> bool; 35 } 36 37 #[no_mangle] 38 unsafe extern "C" fn kernel_main( 39 mb2_info: u64, 40 mb2_magic: u64, 41 bsp_gdt_size: u64, 42 bsp_idt_size: u64, 43 ) -> ! { 44 let mut gdtp = DescriptorTablePointer::<usize>::default(); 45 let gdt_vaddr = 46 MMArch::phys_2_virt(PhysAddr::new(&GDT_Table as *const usize as usize)).unwrap(); 47 let idt_vaddr = 48 MMArch::phys_2_virt(PhysAddr::new(&IDT_Table as *const usize as usize)).unwrap(); 49 gdtp.base = gdt_vaddr.data() as *const usize; 50 gdtp.limit = bsp_gdt_size as u16 - 1; 51 52 let idtp = DescriptorTablePointer::<usize> { 53 base: idt_vaddr.data() as *const usize, 54 limit: bsp_idt_size as u16 - 1, 55 }; 56 57 x86::dtables::lgdt(&gdtp); 58 x86::dtables::lidt(&idtp); 59 60 compiler_fence(Ordering::SeqCst); 61 multiboot2_init(mb2_info, (mb2_magic & 0xFFFF_FFFF) as u32); 62 compiler_fence(Ordering::SeqCst); 63 64 start_kernel(); 65 } 66 67 /// 在内存管理初始化之前的架构相关的早期初始化 68 #[inline(never)] 69 pub fn early_setup_arch() -> Result<(), SystemError> { 70 let stack_start = unsafe { *(head_stack_start as *const u64) } as usize; 71 debug!("head_stack_start={:#x}\n", stack_start); 72 unsafe { 73 let gdt_vaddr = 74 MMArch::phys_2_virt(PhysAddr::new(&GDT_Table as *const usize as usize)).unwrap(); 75 let idt_vaddr = 76 MMArch::phys_2_virt(PhysAddr::new(&IDT_Table as *const usize as usize)).unwrap(); 77 78 debug!("GDT_Table={:?}, IDT_Table={:?}\n", gdt_vaddr, idt_vaddr); 79 } 80 81 set_current_core_tss(stack_start, 0); 82 unsafe { TSSManager::load_tr() }; 83 arch_trap_init().expect("arch_trap_init failed"); 84 85 return Ok(()); 86 } 87 88 /// 架构相关的初始化 89 #[inline(never)] 90 pub fn setup_arch() -> Result<(), SystemError> { 91 return Ok(()); 92 } 93 94 /// 架构相关的初始化（在IDLE的最后一个阶段） 95 #[inline(never)] 96 pub fn setup_arch_post() -> Result<(), SystemError> { 97 let ret = hpet_init(); 98 if ret.is_ok() { 99 hpet_instance().hpet_enable().expect("hpet enable failed"); 100 } else { 101 init_acpi_pm_clocksource().expect("acpi_pm_timer inits failed"); 102 } 103 TSCManager::init().expect("tsc init failed"); 104 105 return Ok(()); 106 } 107 108 fn set_current_core_tss(stack_start: usize, ist0: usize) { 109 let current_tss = unsafe { TSSManager::current_tss() }; 110 debug!( 111 "set_current_core_tss: stack_start={:#x}, ist0={:#x}\n", 112 stack_start, ist0 113 ); 114 current_tss.set_rsp(x86::Ring::Ring0, stack_start as u64); 115 current_tss.set_ist(0, ist0 as u64); 116 } 117