Searched refs:vgpu_fence_sz (Results 1 – 4 of 4) sorted by relevance
140 if (drm_WARN_ON(&i915->drm, fence >= vgpu_fence_sz(vgpu))) in intel_vgpu_write_fence()162 for (i = 0; i < vgpu_fence_sz(vgpu); i++) in _clear_vgpu_fence()174 if (drm_WARN_ON(&gvt->gt->i915->drm, !vgpu_fence_sz(vgpu))) in free_vgpu_fence()181 for (i = 0; i < vgpu_fence_sz(vgpu); i++) { in free_vgpu_fence()204 for (i = 0; i < vgpu_fence_sz(vgpu); i++) { in alloc_vgpu_fence()221 for (i = 0; i < vgpu_fence_sz(vgpu); i++) { in alloc_vgpu_fence()239 gvt->fence.vgpu_allocated_fence_num -= vgpu_fence_sz(vgpu); in free_resource()285 vgpu_fence_sz(vgpu) = request; in alloc_resource()
61 vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu); in populate_pvinfo_page()71 gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu)); in populate_pvinfo_page()
451 #define vgpu_fence_sz(vgpu) (vgpu->fence.size) macro
195 unsigned int max_fence = vgpu_fence_sz(vgpu); in sanitize_fence_mmio_access()3209 for (i = 0; i < vgpu_fence_sz(vgpu); i++) in intel_gvt_restore_fence()