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Searched refs:regSH_MEM_CONFIG (Results 1 – 7 of 7) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v11.c86 WREG32(SOC15_REG_OFFSET(GC, 0, regSH_MEM_CONFIG), sh_mem_config); in program_sh_mem_settings_v11()
Dgfx_v9_4_3.c926 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSH_MEM_CONFIG, sh_mem_config); in gfx_v9_4_3_xcc_init_compute_vmid()
983 regSH_MEM_CONFIG, tmp); in gfx_v9_4_3_xcc_constants_init()
992 regSH_MEM_CONFIG, tmp); in gfx_v9_4_3_xcc_constants_init()
Dgfx_v11_0.c1647 WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); in gfx_v11_0_init_compute_vmid()
1726 WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); in gfx_v11_0_constants_init()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h6118 #define regSH_MEM_CONFIG macro
Dgc_9_4_3_offset.h424 #define regSH_MEM_CONFIG macro
Dgc_11_0_0_offset.h6284 #define regSH_MEM_CONFIG macro
Dgc_11_0_3_offset.h6564 #define regSH_MEM_CONFIG macro