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Searched refs:regNBIF_SMN_VWR_VCHG_DIS_CTRL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_9_0_offset.h6161 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_BASE_IDX 8 macro
Dnbio_4_3_0_offset.h13773 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_BASE_IDX … macro
Dnbio_7_7_0_offset.h6695 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_BASE_IDX … macro
Dnbio_7_2_0_offset.h7465 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_BASE_IDX … macro