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Searched refs:regCP_MQD_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dmes_v11_0.c838 data = RREG32_SOC15(GC, 0, regCP_MQD_CONTROL); in mes_v11_0_queue_init_register()
840 WREG32_SOC15(GC, 0, regCP_MQD_CONTROL, 0); in mes_v11_0_queue_init_register()
Dgfx_v9_4_3.c1534 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_CONTROL); in gfx_v9_4_3_xcc_mqd_init()
1646 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MQD_CONTROL, in gfx_v9_4_3_xcc_kiq_init_register()
Dgfx_v11_0.c3795 tmp = RREG32_SOC15(GC, 0, regCP_MQD_CONTROL); in gfx_v11_0_compute_mqd_init()
3920 WREG32_SOC15(GC, 0, regCP_MQD_CONTROL, in gfx_v11_0_kiq_init_register()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h765 #define regCP_MQD_CONTROL macro
Dgc_9_4_3_offset.h3354 #define regCP_MQD_CONTROL macro
Dgc_11_0_0_offset.h4672 #define regCP_MQD_CONTROL macro
Dgc_11_0_3_offset.h4896 #define regCP_MQD_CONTROL macro