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Searched refs:regBIF_BX_PF1_MAILBOX_MSGBUF_RCV_DW3_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_9_0_offset.h6825 #define regBIF_BX_PF1_MAILBOX_MSGBUF_RCV_DW3_BASE_IDX 8 macro
Dnbio_4_3_0_offset.h14461 #define regBIF_BX_PF1_MAILBOX_MSGBUF_RCV_DW3_BASE_IDX … macro
Dnbio_7_7_0_offset.h5727 #define regBIF_BX_PF1_MAILBOX_MSGBUF_RCV_DW3_BASE_IDX … macro
Dnbio_7_2_0_offset.h6523 #define regBIF_BX_PF1_MAILBOX_MSGBUF_RCV_DW3_BASE_IDX … macro