Searched refs:pfit_control (Results 1 – 7 of 7) sorted by relevance
522 u32 *pfit_control) in i965_scale_aspect() argument533 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()536 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()539 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; in i965_scale_aspect()543 u32 *pfit_control, u32 *pfit_pgm_ratios, in i9xx_scale_aspect() argument569 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()584 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()590 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()603 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; in gmch_panel_fitting() local626 i965_scale_aspect(crtc_state, &pfit_control); in gmch_panel_fitting()[all …]
267 u32 pfit_control; in cdv_intel_lvds_mode_set() local282 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in cdv_intel_lvds_mode_set()286 pfit_control = 0; in cdv_intel_lvds_mode_set()288 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_lvds_mode_set()291 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in cdv_intel_lvds_mode_set()293 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
461 u32 pfit_control; in psb_intel_lvds_mode_set() local476 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in psb_intel_lvds_mode_set()480 pfit_control = 0; in psb_intel_lvds_mode_set()483 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in psb_intel_lvds_mode_set()485 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
349 u32 pfit_control; in oaktrail_panel_fitter_pipe() local351 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()354 if ((pfit_control & PFIT_ENABLE) == 0) in oaktrail_panel_fitter_pipe()356 return (pfit_control >> 29) & 3; in oaktrail_panel_fitter_pipe()
82 u32 pfit_control; in psb_intel_panel_fitter_pipe() local84 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()87 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()
561 u32 pfit_control; in cdv_intel_panel_fitter_pipe() local563 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()566 if ((pfit_control & PFIT_ENABLE) == 0) in cdv_intel_panel_fitter_pipe()568 return (pfit_control >> 29) & 0x3; in cdv_intel_panel_fitter_pipe()
1089 uint32_t pfit_control; in cdv_intel_dp_mode_set() local1094 pfit_control = PFIT_ENABLE; in cdv_intel_dp_mode_set()1096 pfit_control = 0; in cdv_intel_dp_mode_set()1098 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_dp_mode_set()1100 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()