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Searched refs:pcs (Results 1 – 25 of 132) sorted by relevance

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/linux-6.6.21/drivers/pinctrl/
Dpinctrl-single.c209 #define PCS_QUIRK_HAS_SHARED_IRQ (pcs->flags & PCS_QUIRK_SHARED_IRQ)
210 #define PCS_HAS_IRQ (pcs->flags & PCS_FEAT_IRQ)
211 #define PCS_HAS_PINCONF (pcs->flags & PCS_FEAT_PINCONF)
272 static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs, in pcs_pin_reg_offset_get() argument
275 unsigned int mux_bytes = pcs->width / BITS_PER_BYTE; in pcs_pin_reg_offset_get()
277 if (pcs->bits_per_mux) { in pcs_pin_reg_offset_get()
280 pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; in pcs_pin_reg_offset_get()
287 static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs, in pcs_pin_shift_reg_get() argument
290 return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin; in pcs_pin_shift_reg_get()
297 struct pcs_device *pcs; in pcs_pin_dbg_show() local
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/linux-6.6.21/drivers/net/pcs/
Dpcs-lynx.c24 struct phylink_pcs pcs; member
35 #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
36 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
38 static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs, in lynx_pcs_get_state_usxgmii() argument
41 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii()
42 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
61 static void lynx_pcs_get_state_2500basex(struct mdio_device *pcs, in lynx_pcs_get_state_2500basex() argument
66 bmsr = mdiodev_read(pcs, MII_BMSR); in lynx_pcs_get_state_2500basex()
67 lpa = mdiodev_read(pcs, MII_LPA); in lynx_pcs_get_state_2500basex()
83 static void lynx_pcs_get_state(struct phylink_pcs *pcs, in lynx_pcs_get_state() argument
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Dpcs-mtk-lynxi.c82 struct phylink_pcs pcs; member
86 static struct mtk_pcs_lynxi *pcs_to_mtk_pcs_lynxi(struct phylink_pcs *pcs) in pcs_to_mtk_pcs_lynxi() argument
88 return container_of(pcs, struct mtk_pcs_lynxi, pcs); in pcs_to_mtk_pcs_lynxi()
91 static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs, in mtk_pcs_lynxi_get_state() argument
94 struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); in mtk_pcs_lynxi_get_state()
105 static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int neg_mode, in mtk_pcs_lynxi_config() argument
110 struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); in mtk_pcs_lynxi_config()
203 static void mtk_pcs_lynxi_restart_an(struct phylink_pcs *pcs) in mtk_pcs_lynxi_restart_an() argument
205 struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); in mtk_pcs_lynxi_restart_an()
210 static void mtk_pcs_lynxi_link_up(struct phylink_pcs *pcs, in mtk_pcs_lynxi_link_up() argument
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DMakefile4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-nxp.o pcs-xpcs-wx.o
7 obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o
8 obj-$(CONFIG_PCS_MTK_LYNXI) += pcs-mtk-lynxi.o
9 obj-$(CONFIG_PCS_RZN1_MIIC) += pcs-rzn1-miic.o
Dpcs-rzn1-miic.c142 struct phylink_pcs pcs; member
147 static struct miic_port *phylink_pcs_to_miic_port(struct phylink_pcs *pcs) in phylink_pcs_to_miic_port() argument
149 return container_of(pcs, struct miic_port, pcs); in phylink_pcs_to_miic_port()
186 static int miic_config(struct phylink_pcs *pcs, unsigned int mode, in miic_config() argument
190 struct miic_port *miic_port = phylink_pcs_to_miic_port(pcs); in miic_config()
237 static void miic_link_up(struct phylink_pcs *pcs, unsigned int mode, in miic_link_up() argument
240 struct miic_port *miic_port = phylink_pcs_to_miic_port(pcs); in miic_link_up()
271 static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported, in miic_validate() argument
335 miic_port->pcs.ops = &miic_phylink_ops; in miic_create()
337 return &miic_port->pcs; in miic_create()
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/linux-6.6.21/drivers/net/dsa/b53/
Db53_serdes.c20 static inline struct b53_pcs *pcs_to_b53_pcs(struct phylink_pcs *pcs) in pcs_to_b53_pcs() argument
22 return container_of(pcs, struct b53_pcs, pcs); in pcs_to_b53_pcs()
68 static int b53_serdes_config(struct phylink_pcs *pcs, unsigned int neg_mode, in b53_serdes_config() argument
73 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_config()
74 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_config()
89 static void b53_serdes_an_restart(struct phylink_pcs *pcs) in b53_serdes_an_restart() argument
91 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_an_restart()
92 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_an_restart()
102 static void b53_serdes_get_state(struct phylink_pcs *pcs, in b53_serdes_get_state() argument
105 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_get_state()
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/linux-6.6.21/drivers/net/dsa/mv88e6xxx/
Dpcs-639x.c129 static struct mv88e639x_pcs *sgmii_pcs_to_mv88e639x_pcs(struct phylink_pcs *pcs) in sgmii_pcs_to_mv88e639x_pcs() argument
131 return container_of(pcs, struct mv88e639x_pcs, sgmii_pcs); in sgmii_pcs_to_mv88e639x_pcs()
183 static int mv88e639x_sgmii_pcs_enable(struct phylink_pcs *pcs) in mv88e639x_sgmii_pcs_enable() argument
185 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_enable()
193 static void mv88e639x_sgmii_pcs_disable(struct phylink_pcs *pcs) in mv88e639x_sgmii_pcs_disable() argument
195 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_disable()
201 static void mv88e639x_sgmii_pcs_pre_config(struct phylink_pcs *pcs, in mv88e639x_sgmii_pcs_pre_config() argument
204 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_pre_config()
240 static int mv88e639x_sgmii_pcs_post_config(struct phylink_pcs *pcs, in mv88e639x_sgmii_pcs_post_config() argument
243 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_post_config()
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Dpcs-6352.c33 static struct marvell_c22_pcs *pcs_to_marvell_c22_pcs(struct phylink_pcs *pcs) in pcs_to_marvell_c22_pcs() argument
35 return container_of(pcs, struct marvell_c22_pcs, phylink_pcs); in pcs_to_marvell_c22_pcs()
140 static int marvell_c22_pcs_enable(struct phylink_pcs *pcs) in marvell_c22_pcs_enable() argument
142 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_enable()
152 static void marvell_c22_pcs_disable(struct phylink_pcs *pcs) in marvell_c22_pcs_disable() argument
154 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_disable()
160 static void marvell_c22_pcs_get_state(struct phylink_pcs *pcs, in marvell_c22_pcs_get_state() argument
163 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_get_state()
184 static int marvell_c22_pcs_config(struct phylink_pcs *pcs, in marvell_c22_pcs_config() argument
190 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_config()
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Dpcs-6185.c24 static struct mv88e6185_pcs *pcs_to_mv88e6185_pcs(struct phylink_pcs *pcs) in pcs_to_mv88e6185_pcs() argument
26 return container_of(pcs, struct mv88e6185_pcs, phylink_pcs); in pcs_to_mv88e6185_pcs()
57 static void mv88e6185_pcs_get_state(struct phylink_pcs *pcs, in mv88e6185_pcs_get_state() argument
60 struct mv88e6185_pcs *mpcs = pcs_to_mv88e6185_pcs(pcs); in mv88e6185_pcs_get_state()
98 static int mv88e6185_pcs_config(struct phylink_pcs *pcs, unsigned int mode, in mv88e6185_pcs_config() argument
106 static void mv88e6185_pcs_an_restart(struct phylink_pcs *pcs) in mv88e6185_pcs_an_restart() argument
/linux-6.6.21/include/linux/
Dphylink.h512 int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported,
514 int (*pcs_enable)(struct phylink_pcs *pcs);
515 void (*pcs_disable)(struct phylink_pcs *pcs);
516 void (*pcs_pre_config)(struct phylink_pcs *pcs,
518 int (*pcs_post_config)(struct phylink_pcs *pcs,
520 void (*pcs_get_state)(struct phylink_pcs *pcs,
522 int (*pcs_config)(struct phylink_pcs *pcs, unsigned int neg_mode,
526 void (*pcs_an_restart)(struct phylink_pcs *pcs);
527 void (*pcs_link_up)(struct phylink_pcs *pcs, unsigned int neg_mode,
546 int pcs_validate(struct phylink_pcs *pcs, unsigned long *supported,
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/linux-6.6.21/arch/arm64/boot/dts/freescale/
Dfsl-ls1046-post.dtsi27 pcs-handle-names = "qsgmii";
41 pcs-handle-names = "sgmii", "qsgmii";
46 pcs-handle-names = "sgmii", "qsgmii";
54 pcs-handle-names = "sgmii", "qsgmii", "xfi";
58 qsgmiib_pcs1: ethernet-pcs@1 {
59 compatible = "fsl,lynx-pcs";
63 qsgmiib_pcs2: ethernet-pcs@2 {
64 compatible = "fsl,lynx-pcs";
68 qsgmiib_pcs3: ethernet-pcs@3 {
69 compatible = "fsl,lynx-pcs";
Dfsl-ls1043-post.dtsi27 pcs-handle-names = "qsgmii";
32 pcs-handle-names = "sgmii", "qsgmii";
43 pcs-handle-names = "sgmii", "qsgmii";
48 pcs-handle-names = "sgmii", "qsgmii";
55 qsgmiib_pcs1: ethernet-pcs@1 {
56 compatible = "fsl,lynx-pcs";
60 qsgmiib_pcs2: ethernet-pcs@2 {
61 compatible = "fsl,lynx-pcs";
65 qsgmiib_pcs3: ethernet-pcs@3 {
66 compatible = "fsl,lynx-pcs";
Dfsl-ls1088a-rdb.dts23 pcs-handle = <&pcs2>;
30 pcs-handle = <&pcs3_0>;
37 pcs-handle = <&pcs3_1>;
44 pcs-handle = <&pcs3_2>;
51 pcs-handle = <&pcs3_3>;
58 pcs-handle = <&pcs7_0>;
65 pcs-handle = <&pcs7_1>;
72 pcs-handle = <&pcs7_2>;
79 pcs-handle = <&pcs7_3>;
Dfsl-ls1088a-ten64.dts95 pcs-handle = <&pcs1>;
103 pcs-handle = <&pcs2>;
113 pcs-handle = <&pcs3_0>;
120 pcs-handle = <&pcs3_1>;
127 pcs-handle = <&pcs3_2>;
134 pcs-handle = <&pcs3_3>;
142 pcs-handle = <&pcs7_0>;
149 pcs-handle = <&pcs7_1>;
156 pcs-handle = <&pcs7_2>;
163 pcs-handle = <&pcs7_3>;
/linux-6.6.21/Documentation/devicetree/bindings/net/
Dnvidia,tegra234-mgbe.yaml49 - const: eee-pcs
50 - const: rx-pcs-input
51 - const: rx-pcs-m
52 - const: rx-pcs
53 - const: tx-pcs
61 - const: pcs
137 "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
138 "rx-pcs", "tx-pcs";
141 reset-names = "mac", "pcs";
Dfsl,fman-dtsec.yaml101 description: See pcs-handle.
103 pcs-handle:
108 pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first
109 reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is
112 pcs-handle-names:
134 pcs-handle-names:
135 - pcs-handle
167 pcs-handle = <&pcsphy4>, <&qsgmiib_pcs1>;
168 pcs-handle-names = "sgmii", "qsgmii";
/linux-6.6.21/drivers/clocksource/
Dtimer-pistachio.c70 struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); in pistachio_clocksource_read_cycles() local
80 raw_spin_lock_irqsave(&pcs->lock, flags); in pistachio_clocksource_read_cycles()
81 overflow = gpt_readl(pcs->base, TIMER_CURRENT_OVERFLOW_VALUE, 0); in pistachio_clocksource_read_cycles()
82 counter = gpt_readl(pcs->base, TIMER_CURRENT_VALUE, 0); in pistachio_clocksource_read_cycles()
83 raw_spin_unlock_irqrestore(&pcs->lock, flags); in pistachio_clocksource_read_cycles()
96 struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); in pistachio_clksrc_set_mode() local
99 val = gpt_readl(pcs->base, TIMER_CFG, timeridx); in pistachio_clksrc_set_mode()
105 gpt_writel(pcs->base, val, TIMER_CFG, timeridx); in pistachio_clksrc_set_mode()
110 struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); in pistachio_clksrc_enable() local
114 gpt_writel(pcs->base, RELOAD_VALUE, TIMER_RELOAD_VALUE, timeridx); in pistachio_clksrc_enable()
/linux-6.6.21/drivers/net/phy/
Dphylink.c51 struct phylink_pcs *pcs; member
660 struct phylink_pcs *pcs; in phylink_validate_mac_and_pcs() local
665 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); in phylink_validate_mac_and_pcs()
666 if (IS_ERR(pcs)) in phylink_validate_mac_and_pcs()
667 return PTR_ERR(pcs); in phylink_validate_mac_and_pcs()
669 pcs = pl->pcs; in phylink_validate_mac_and_pcs()
672 if (pcs) { in phylink_validate_mac_and_pcs()
677 if (!pcs->ops) { in phylink_validate_mac_and_pcs()
685 if (pcs->ops->pcs_validate) { in phylink_validate_mac_and_pcs()
686 ret = pcs->ops->pcs_validate(pcs, supported, state); in phylink_validate_mac_and_pcs()
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/linux-6.6.21/drivers/net/ethernet/microchip/lan966x/
Dlan966x_phylink.c85 static struct lan966x_port *lan966x_pcs_to_port(struct phylink_pcs *pcs) in lan966x_pcs_to_port() argument
87 return container_of(pcs, struct lan966x_port, phylink_pcs); in lan966x_pcs_to_port()
90 static void lan966x_pcs_get_state(struct phylink_pcs *pcs, in lan966x_pcs_get_state() argument
93 struct lan966x_port *port = lan966x_pcs_to_port(pcs); in lan966x_pcs_get_state()
98 static int lan966x_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, in lan966x_pcs_config() argument
103 struct lan966x_port *port = lan966x_pcs_to_port(pcs); in lan966x_pcs_config()
120 static void lan966x_pcs_aneg_restart(struct phylink_pcs *pcs) in lan966x_pcs_aneg_restart() argument
/linux-6.6.21/Documentation/devicetree/bindings/net/pcs/
Dfsl,lynx-pcs.yaml4 $id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml#
19 const: fsl,lynx-pcs
36 qsgmii_pcs1: ethernet-pcs@1 {
37 compatible = "fsl,lynx-pcs";
/linux-6.6.21/drivers/net/ethernet/microchip/sparx5/
Dsparx5_phylink.c75 static struct sparx5_port *sparx5_pcs_to_port(struct phylink_pcs *pcs) in sparx5_pcs_to_port() argument
77 return container_of(pcs, struct sparx5_port, phylink_pcs); in sparx5_pcs_to_port()
80 static void sparx5_pcs_get_state(struct phylink_pcs *pcs, in sparx5_pcs_get_state() argument
83 struct sparx5_port *port = sparx5_pcs_to_port(pcs); in sparx5_pcs_get_state()
94 static int sparx5_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, in sparx5_pcs_config() argument
99 struct sparx5_port *port = sparx5_pcs_to_port(pcs); in sparx5_pcs_config()
129 static void sparx5_pcs_aneg_restart(struct phylink_pcs *pcs) in sparx5_pcs_aneg_restart() argument
/linux-6.6.21/drivers/phy/qualcomm/
Dphy-qcom-qmp-ufs.c703 u16 pcs; member
718 const struct qmp_phy_init_tbl *pcs; member
755 void __iomem *pcs; member
816 .pcs = 0xc00,
825 .pcs = 0x0400,
869 .pcs = sm8350_ufsphy_pcs,
881 .pcs = sm8350_ufsphy_g4_pcs,
903 .pcs = sm8350_ufsphy_pcs,
915 .pcs = sm8350_ufsphy_g4_pcs,
937 .pcs = sdm845_ufsphy_pcs,
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/linux-6.6.21/drivers/net/ethernet/freescale/dpaa2/
Ddpaa2-mac.c157 return mac->pcs; in dpaa2_mac_select_pcs()
256 struct phylink_pcs *pcs; in dpaa2_pcs_create() local
265 pcs = lynx_pcs_create_fwnode(node); in dpaa2_pcs_create()
268 if (pcs == ERR_PTR(-EPROBE_DEFER)) { in dpaa2_pcs_create()
273 if (pcs == ERR_PTR(-ENODEV)) { in dpaa2_pcs_create()
275 return PTR_ERR(pcs); in dpaa2_pcs_create()
278 if (IS_ERR(pcs)) { in dpaa2_pcs_create()
280 "lynx_pcs_create_fwnode() failed: %pe\n", pcs); in dpaa2_pcs_create()
281 return PTR_ERR(pcs); in dpaa2_pcs_create()
284 mac->pcs = pcs; in dpaa2_pcs_create()
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/linux-6.6.21/drivers/net/fddi/skfp/
Dpcmplc.c1849 struct pcm_state *pcs ; in pcm_get_state() local
1856 for (i = 0, phy = smc->y, pcs = state->pcm_state ; i < NUMPHYS ; in pcm_get_state()
1857 i++ , phy++, pcs++ ) { in pcm_get_state()
1859 pcs->pcm_type = (u_char) mib->fddiPORTMy_Type ; in pcm_get_state()
1860 pcs->pcm_state = (u_char) mib->fddiPORTPCMState ; in pcm_get_state()
1861 pcs->pcm_mode = phy->pc_mode ; in pcm_get_state()
1862 pcs->pcm_neighbor = (u_char) mib->fddiPORTNeighborType ; in pcm_get_state()
1863 pcs->pcm_bsf = mib->fddiPORTBS_Flag ; in pcm_get_state()
1864 pcs->pcm_lsf = phy->ls_flag ; in pcm_get_state()
1865 pcs->pcm_lct_fail = (u_char) mib->fddiPORTLCTFail_Ct ; in pcm_get_state()
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/linux-6.6.21/drivers/hwmon/peci/
Dcputemp.c90 u32 pcs; in update_temp_target() local
96 ret = peci_pcs_read(priv->peci_dev, PECI_PCS_TEMP_TARGET, 0, &pcs); in update_temp_target()
101 FIELD_GET(TEMP_TARGET_REF_TEMP_MASK, pcs) * MILLIDEGREE_PER_DEGREE; in update_temp_target()
103 tcontrol_margin = FIELD_GET(TEMP_TARGET_FAN_TEMP_MASK, pcs); in update_temp_target()
107 tthrottle_offset = FIELD_GET(TEMP_TARGET_TJ_OFFSET_MASK, pcs) * MILLIDEGREE_PER_DEGREE; in update_temp_target()
217 u32 pcs; in get_dts() local
223 ret = peci_pcs_read(priv->peci_dev, PECI_PCS_THERMAL_MARGIN, 0, &pcs); in get_dts()
227 thermal_margin = FIELD_GET(DTS_MARGIN_MASK, pcs); in get_dts()
255 u32 pcs; in get_core_temp() local
261 ret = peci_pcs_read(priv->peci_dev, PECI_PCS_MODULE_TEMP, core_index, &pcs); in get_core_temp()
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