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Searched refs:ixAZALIA_INPUT_CRC1_CHANNEL4 (Results 1 – 17 of 17) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_d.h6712 #define ixAZALIA_INPUT_CRC1_CHANNEL4 0x4 macro
Ddce_11_0_d.h6874 #define ixAZALIA_INPUT_CRC1_CHANNEL4 0x4 macro
Ddce_11_2_d.h8219 #define ixAZALIA_INPUT_CRC1_CHANNEL4 0x4 macro
Ddce_12_0_offset.h18100 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7383 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_0_1_offset.h12226 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_2_1_0_offset.h12830 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_1_0_offset.h13070 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_1_4_offset.h196 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_2_1_offset.h13516 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_1_2_offset.h14040 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_2_0_offset.h13537 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_1_5_offset.h14146 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_0_2_offset.h15119 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_1_6_offset.h14637 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_2_0_0_offset.h16494 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro
Ddcn_3_0_0_offset.h16843 #define ixAZALIA_INPUT_CRC1_CHANNEL4 … macro