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Searched refs:ib_cntl (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dsdma_v4_4_2.c429 u32 rb_cntl, ib_cntl; in sdma_v4_4_2_inst_gfx_stop() local
443 ib_cntl = RREG32_SDMA(i, regSDMA_GFX_IB_CNTL); in sdma_v4_4_2_inst_gfx_stop()
444 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v4_4_2_inst_gfx_stop()
445 WREG32_SDMA(i, regSDMA_GFX_IB_CNTL, ib_cntl); in sdma_v4_4_2_inst_gfx_stop()
475 u32 rb_cntl, ib_cntl; in sdma_v4_4_2_inst_page_stop() local
492 ib_cntl = RREG32_SDMA(i, regSDMA_PAGE_IB_CNTL); in sdma_v4_4_2_inst_page_stop()
493 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA_PAGE_IB_CNTL, in sdma_v4_4_2_inst_page_stop()
495 WREG32_SDMA(i, regSDMA_PAGE_IB_CNTL, ib_cntl); in sdma_v4_4_2_inst_page_stop()
621 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_4_2_gfx_resume() local
688 ib_cntl = RREG32_SDMA(i, regSDMA_GFX_IB_CNTL); in sdma_v4_4_2_gfx_resume()
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Dsdma_v2_4.c339 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_stop() local
348 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
349 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v2_4_gfx_stop()
350 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_stop()
405 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_resume() local
462 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
463 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v2_4_gfx_resume()
465 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v2_4_gfx_resume()
468 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_resume()
Dsdma_v4_0.c875 u32 rb_cntl, ib_cntl; in sdma_v4_0_gfx_enable() local
884 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_enable()
885 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, enable ? 1 : 0); in sdma_v4_0_gfx_enable()
886 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_enable()
911 u32 rb_cntl, ib_cntl; in sdma_v4_0_page_stop() local
921 ib_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL); in sdma_v4_0_page_stop()
922 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_PAGE_IB_CNTL, in sdma_v4_0_page_stop()
924 WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl); in sdma_v4_0_page_stop()
1046 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_0_gfx_resume() local
1110 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_resume()
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Dsdma_v3_0.c513 u32 rb_cntl, ib_cntl; in sdma_v3_0_gfx_stop() local
522 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_stop()
523 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v3_0_gfx_stop()
524 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_stop()
640 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v3_0_gfx_resume() local
730 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
731 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v3_0_gfx_resume()
733 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v3_0_gfx_resume()
736 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_resume()
Dsdma_v5_2.c364 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_stop() local
373 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_stop()
374 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_2_gfx_stop()
375 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_stop()
486 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_resume() local
612 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_resume()
613 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_2_gfx_resume()
615 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_2_gfx_resume()
618 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_resume()
Dsdma_v6_0.c381 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_stop() local
390 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_stop()
391 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 0); in sdma_v6_0_gfx_stop()
392 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_stop()
470 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_resume() local
583 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_resume()
584 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1); in sdma_v6_0_gfx_resume()
586 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v6_0_gfx_resume()
589 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_resume()
Dsdma_v5_0.c559 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_stop() local
568 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_stop()
569 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_0_gfx_stop()
570 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_stop()
683 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_resume() local
812 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_resume()
813 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_0_gfx_resume()
815 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_0_gfx_resume()
818 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_resume()
Dsi_dma.c131 u32 rb_cntl, dma_cntl, ib_cntl, rb_bufsz; in si_dma_start() local
163 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in si_dma_start()
165 ib_cntl |= DMA_IB_SWAP_ENABLE; in si_dma_start()
167 WREG32(DMA_IB_CNTL + sdma_offsets[i], ib_cntl); in si_dma_start()
Dcik_sdma.c429 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
486 ib_cntl = SDMA0_GFX_IB_CNTL__IB_ENABLE_MASK; in cik_sdma_gfx_resume()
488 ib_cntl |= SDMA0_GFX_IB_CNTL__IB_SWAP_ENABLE_MASK; in cik_sdma_gfx_resume()
491 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in cik_sdma_gfx_resume()
/linux-6.6.21/drivers/gpu/drm/radeon/
Dr600_dma.c122 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local
153 ib_cntl = DMA_IB_ENABLE; in r600_dma_resume()
155 ib_cntl |= DMA_IB_SWAP_ENABLE; in r600_dma_resume()
157 WREG32(DMA_IB_CNTL, ib_cntl); in r600_dma_resume()
Dni_dma.c189 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local
232 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in cayman_dma_resume()
234 ib_cntl |= DMA_IB_SWAP_ENABLE; in cayman_dma_resume()
236 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
Dcik_sdma.c367 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
416 ib_cntl = SDMA_IB_ENABLE; in cik_sdma_gfx_resume()
418 ib_cntl |= SDMA_IB_SWAP_ENABLE; in cik_sdma_gfx_resume()
421 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()