Searched refs:fclks (Results 1 – 3 of 3) sorted by relevance
1449 struct dm_pp_clock_levels_with_voltage *fclks) in dcn_bw_update_from_pplib_fclks() argument1453 ASSERT(fclks->num_levels); in dcn_bw_update_from_pplib_fclks()1456 vmid0p72_idx = fclks->num_levels - in dcn_bw_update_from_pplib_fclks()1457 (fclks->num_levels > 2 ? 3 : (fclks->num_levels > 1 ? 2 : 1)); in dcn_bw_update_from_pplib_fclks()1458 vnom0p8_idx = fclks->num_levels - (fclks->num_levels > 1 ? 2 : 1); in dcn_bw_update_from_pplib_fclks()1459 vmax0p9_idx = fclks->num_levels - 1; in dcn_bw_update_from_pplib_fclks()1462 32 * (fclks->data[vmin0p65_idx].clocks_in_khz / 1000.0) / 1000.0; in dcn_bw_update_from_pplib_fclks()1465 (fclks->data[vmid0p72_idx].clocks_in_khz / 1000.0) in dcn_bw_update_from_pplib_fclks()1469 (fclks->data[vnom0p8_idx].clocks_in_khz / 1000.0) in dcn_bw_update_from_pplib_fclks()1473 (fclks->data[vmax0p9_idx].clocks_in_khz / 1000.0) in dcn_bw_update_from_pplib_fclks()
1315 struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0}; in dcn10_resource_construct() local1504 ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks); in dcn10_resource_construct()1509 res = verify_clock_values(&fclks); in dcn10_resource_construct()1512 dcn_bw_update_from_pplib_fclks(dc, &fclks); in dcn10_resource_construct()
639 struct dm_pp_clock_levels_with_voltage *fclks);