Searched refs:devcap (Results 1 – 8 of 8) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/vmwgfx/ |
| D | vmwgfx_devcaps.h | 42 uint32_t devcap) in vmw_devcap_get() argument
46 return vmw->devcaps[devcap]; in vmw_devcap_get()
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| /linux-6.6.21/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.c | 80 u8 devcap[MHL_DCAP_SIZE]; member
528 sii8620_update_array(ctx->devcap, dcap, MHL_DCAP_SIZE); in sii8620_mr_devcap()
582 ctx->devcap[reg] = msg->ret; in sii8620_mt_read_devcap_reg_recv()
1307 static const u8 devcap[MHL_DCAP_SIZE] = { in sii8620_set_dev_cap() local
1334 sii8620_write_buf(ctx, REG_MHL_DEVCAP_0, devcap, ARRAY_SIZE(devcap)); in sii8620_set_dev_cap()
1593 memset(ctx->devcap, 0, sizeof(ctx->devcap)); in sii8620_disconnect()
2252 bool can_pack = ctx->devcap[MHL_DCAP_VID_LINK_MODE] & in sii8620_mode_valid()
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| /linux-6.6.21/drivers/pci/ |
| D | pci-bridge-emul.h | 47 __le32 devcap; member
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| D | probe.c | 1542 pci_read_config_dword(pdev, pos + PCI_EXP_DEVCAP, &pdev->devcap); in set_pcie_port_type()
1543 pdev->pcie_mpss = FIELD_GET(PCI_EXP_DEVCAP_PAYLOAD, pdev->devcap); in set_pcie_port_type()
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| D | quirks.c | 6146 u32 l1_lat = FIELD_GET(PCI_EXP_DEVCAP_L1, dev->devcap); in aspm_l1_acceptable_latency()
6149 dev->devcap |= FIELD_PREP(PCI_EXP_DEVCAP_L1, 7); in aspm_l1_acceptable_latency()
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| D | pci.c | 4812 if (!(dev->devcap & PCI_EXP_DEVCAP_FLR)) in pcie_reset_flr()
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| /linux-6.6.21/drivers/pci/pcie/ |
| D | aspm.c | 374 encoding = (endpoint->devcap & PCI_EXP_DEVCAP_L0S) >> 6; in pcie_aspm_check_latency()
378 encoding = (endpoint->devcap & PCI_EXP_DEVCAP_L1) >> 9; in pcie_aspm_check_latency()
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| /linux-6.6.21/include/linux/ |
| D | pci.h | 347 u32 devcap; /* PCIe Device Capabilities */ member
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