Searched refs:crtc1 (Results 1 – 6 of 6) sorted by relevance
85 u32 crtc1 = nvkm_rd32(device, 0x602100); in nv04_disp_intr() local93 if (crtc1 & 0x00000001) { in nv04_disp_intr()
183 if (minfo->crtc1.panpos >= 0) { in matroxfb_crtc1_panpos()188 panpos = minfo->crtc1.panpos; in matroxfb_crtc1_panpos()192 minfo->crtc1.panpos = -1; /* No update pending anymore */ in matroxfb_crtc1_panpos()213 minfo->crtc1.vsync.cnt++; in matrox_irq()215 wake_up_interruptible(&minfo->crtc1.vsync.wait); in matrox_irq()278 vs = &minfo->crtc1.vsync; in matroxfb_wait_for_sync()344 minfo->crtc1.panpos = p2; in matrox_pan_var()347 minfo->crtc1.panpos = -1; in matrox_pan_var()809 minfo->crtc1.pixclock = mt.pixclock; in matroxfb_set_par()810 minfo->crtc1.mnp = mt.mnp; in matroxfb_set_par()[all …]
176 pixelmnp = minfo->crtc1.mnp; in g450_set_plls()212 pxc = minfo->crtc1.pixclock; in g450_set_plls()1057 minfo->crtc1.panpos = -1; in MGA1064_restore()1083 minfo->crtc1.panpos = -1; in MGAG100_restore()
361 } crtc1; member
584 minfo->crtc1.panpos = -1; in Ti3026_restore()
7020 u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; in cik_irq_set() local7165 crtc1 |= VBLANK_INTERRUPT_MASK; in cik_irq_set()7233 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, crtc1); in cik_irq_set()