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Searched refs:SPR (Results 1 – 20 of 20) sorted by relevance

/linux-6.6.21/Documentation/powerpc/
Ddexcr.rst10 The DEXCR is a privileged special purpose register (SPR) introduced in
22 A privileged SPR that can control aspects for userspace and kernel space
24 A hypervisor-privileged SPR that can control aspects for the hypervisor and
27 An optional ultravisor-privileged SPR that can control aspects for the ultravisor.
29 Userspace can examine the current DEXCR state using a dedicated SPR that
31 There is also an SPR that provides a read-only view of the hypervisor enforced
Ddscr.rst58 two SPR numbers available for that purpose.
60 (1) Problem state SPR: 0x03 (Un-privileged, POWER8 only)
61 (2) Privileged state SPR: 0x11 (Privileged)
63 Accessing DSCR through privileged SPR number (0x11) from user space
67 Accessing DSCR through user level SPR (0x03) from user space will first
82 (1) mtspr instruction (SPR number 0x03)
83 (2) mtspr instruction (SPR number 0x11)
Dsyscall64-abi.rst102 failure code TM_CAUSE_SYSCALL | TM_CAUSE_PERSISTENT in the TEXASR SPR.
/linux-6.6.21/arch/powerpc/xmon/
Dspu-insns.h138 APUOP(M_MFSPR, RR, 0x00c, "mfspr", _A2(A_T,A_S), 00002, SPR) /* MFSPR RT<-SA */
139 APUOP(M_RDCH, RR, 0x00d, "rdch", _A2(A_T,A_H), 00002, SPR) /* ReaDCHannel RT<-CA:data */
140 APUOP(M_RCHCNT, RR, 0x00f, "rchcnt", _A2(A_T,A_H), 00002, SPR) /* ReaDCHanCouNT RT<-CA:count */
149 APUOP(M_MTSPR, RR, 0x10c, "mtspr", _A2(A_S,A_T), 00001, SPR) /* MTSPR SA<-RT */
150 APUOP(M_WRCH, RR, 0x10d, "wrch", _A2(A_H,A_T), 00001, SPR) /* ChanWRite CA<-RT */
324 APUOP(M_SYSCALL, RI7, 0x10c, "syscall", _A3(A_T,A_A,A_S7N), 00002, SPR) /* System Ca…
Dppc-opc.c658 #define SPR SI8 + 1 macro
659 #define PMR SPR
660 #define TMR SPR
665 #define SPRBAT SPR + 1
5180 {"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
5181 {"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, 0, {RT, SPR}},
5397 {"mfspr", X(31,339), X_MASK, COM, 0, {RT, SPR}},
5534 {"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
5535 {"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, 0, {SPR, RS}},
5717 {"mtspr", X(31,467), X_MASK, COM, 0, {SPR, RS}},
/linux-6.6.21/drivers/usb/serial/
Dio_16654.h39 #define SPR 7 // ScratchPad Register macro
/linux-6.6.21/include/video/
Dtrident.h51 #define SPR 0x1F /* Software Programming Register (videoram) */ macro
/linux-6.6.21/drivers/edac/
Di10nm_base.c255 if (res_cfg->type == SPR) { in show_retry_rd_err_log()
456 case SPR: in i10nm_mscod_is_ddrt()
495 case SPR: in i10nm_mc_decode_available()
544 case SPR: in i10nm_mc_decode()
674 case SPR: in i10nm_imc_absent()
899 .type = SPR,
Dskx_common.h132 SPR, enumerator
/linux-6.6.21/Documentation/devicetree/bindings/powerpc/opal/
Dpower-mgt.txt55 0x00800000 /* This state uses SPR PMICR instruction */
110 state if the flag indicates that pmicr SPR should be set. This
/linux-6.6.21/Documentation/devicetree/bindings/sound/
Dtlv320aic31xx.txt46 * SPR, devices with stereo speaker amp
/linux-6.6.21/arch/arm64/boot/dts/freescale/
Dimx8mn-bsh-smm-s2pro.dts29 "Ext Spk", "SPR";
/linux-6.6.21/drivers/net/wireless/admtek/
Dadm8211.h34 __le32 SPR; /* 0x48 CSR9 */ member
Dadm8211.c77 u32 reg = ADM8211_CSR_READ(SPR); in adm8211_eeprom_register_read()
99 ADM8211_CSR_WRITE(SPR, reg); in adm8211_eeprom_register_write()
100 ADM8211_CSR_READ(SPR); /* eeprom_delay */ in adm8211_eeprom_register_write()
/linux-6.6.21/Documentation/ABI/stable/
Dsysfs-devices-system-cpu21 SPR) that value will be persisted for that process and used
/linux-6.6.21/Documentation/ABI/testing/
Dsysfs-class-usb_power_delivery218 Standard Power Range (SPR) Programmable Power Supplies
/linux-6.6.21/drivers/video/fbdev/
Dimsttfb.c74 SPR = 27, /* 0x6C */ enumerator
741 write_reg_le32(par->dc_regs, SPR, pitch); in set_imstt_regvals()
Dtridentfb.c924 tmp = read3X4(par, SPR) & 0x0F; in get_memsize()
/linux-6.6.21/arch/arm/boot/dts/ti/omap/
Dam43x-epos-evm.dts116 "Speaker", "SPR";
/linux-6.6.21/Documentation/admin-guide/
Dkernel-parameters.txt7277 meaning SPR registers, memory and, other data
7279 ro same as "rw" option above but SPR registers,