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Searched refs:SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/ !
Dsdma1_4_0_sh_mask.h1458 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT 0x0 macro
Dsdma1_4_2_2_sh_mask.h1472 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT … macro
Dsdma1_4_2_sh_mask.h1464 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/ !
Doss_2_0_sh_mask.h1656 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT 0x0 macro
Doss_2_4_sh_mask.h1856 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT 0x0 macro
Doss_3_0_1_sh_mask.h2802 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT 0x0 macro
Doss_3_0_sh_mask.h2916 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT 0x0 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/ !
Dsdma_4_4_0_sh_mask.h4074 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ !
Dgc_10_1_0_sh_mask.h4022 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT … macro
Dgc_10_3_0_sh_mask.h4195 #define SDMA1_RLC0_RB_BASE_HI__ADDR__SHIFT … macro