/linux-6.6.21/arch/hexagon/kernel/ |
D | vm_entry.S | 37 memd(R0 + #_PT_R3130) = R31:30; \ 38 { memw(R0 + #_PT_R2928) = R28; \ 39 R31 = memw(R0 + #_PT_ER_VMPSP); }\ 40 { memw(R0 + #(_PT_R2928 + 4)) = R31; \ 42 { memd(R0 + #_PT_R2726) = R27:26; \ 44 memd(R0 + #_PT_R2524) = R25:24; \ 45 memd(R0 + #_PT_R2322) = R23:22; \ 46 memd(R0 + #_PT_R2120) = R21:20; \ 47 memd(R0 + #_PT_R1918) = R19:18; \ 48 memd(R0 + #_PT_R1716) = R17:16; \ [all …]
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D | vm_switch.S | 55 memw(R0+#_TASK_THREAD_INFO) = THREADINFO_REG; 56 memw(R0 +#(_TASK_STRUCT_THREAD + _THREAD_STRUCT_SWITCH_SP)) = R29;
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/linux-6.6.21/lib/ |
D | test_bpf.c | 39 #define R0 BPF_REG_0 macro 280 insn[1] = BPF_ALU32_IMM(BPF_MOV, R0, 0xcbababab); in bpf_fill_maxinsns9() 284 insn[i] = BPF_ALU32_IMM(BPF_MOV, R0, 0xfefefefe); in bpf_fill_maxinsns9() 311 insn[hlen] = BPF_ALU32_IMM(BPF_MOV, R0, 0xabababac); in bpf_fill_maxinsns10() 441 insn[0] = BPF_ALU32_IMM(BPF_MOV, R0, 1); in __bpf_fill_stxdw() 445 insn[i] = BPF_STX_XADD(size, R10, R0, -40); in __bpf_fill_stxdw() 447 insn[len - 2] = BPF_LDX_MEM(size, R0, R10, -40); in __bpf_fill_stxdw() 492 insns[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 1); in __bpf_fill_max_jmp() 493 insns[i++] = BPF_JMP_IMM(jmp, R0, imm, S16_MAX); in __bpf_fill_max_jmp() 494 insns[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 2); in __bpf_fill_max_jmp() [all …]
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/linux-6.6.21/Documentation/devicetree/bindings/pinctrl/ |
D | mediatek,mt8365-pinctrl.yaml | 78 description: Pull up R1/R0 type define value. 80 For pull up type is normal, it don't need add R1/R0 define. 81 For pull up type is R1/R0 type, it can add value to set different 83 100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 84 101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 85 102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 86 103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 92 description: Pull down R1/R0 type define value. 94 For pull down type is normal, it don't need add R1/R0 define. 95 For pull down type is R1/R0 type, it can add value to set [all …]
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D | mediatek,mt6795-pinctrl.yaml | 101 description: mt6795 pull down PUPD/R0/R1 type define value. 104 values; When pull down type is PUPD/R0/R1, adding R1R0 defines 111 description: mt6795 pull up PUPD/R0/R1 type define value. 114 values; When pull up type is PUPD/R0/R1, adding R1R0 defines will 133 Pull up settings for 2 pull resistors, R0 and R1. User can 136 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 137 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 138 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 139 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 145 Pull down settings for 2 pull resistors, R0 and R1. User can [all …]
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D | mediatek,mt6779-pinctrl.yaml | 162 Pull up settings for 2 pull resistors, R0 and R1. User can 165 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 166 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 167 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 168 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 174 Pull down settings for 2 pull resistors, R0 and R1. User can 177 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 178 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 179 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 180 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
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D | mediatek,mt8183-pinctrl.yaml | 146 Pull up settings for 2 pull resistors, R0 and R1. User can 149 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 150 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 151 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 152 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 158 Pull down settings for 2 pull resistors, R0 and R1. User can 161 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 162 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 163 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 164 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
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D | mediatek,mt7986-pinctrl.yaml | 303 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 312 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 335 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments 337 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 338 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 339 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 340 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 347 Pull down settings for 2 pull resistors, R0 and R1. Valid arguments 349 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 350 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. [all …]
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D | mediatek,mt7981-pinctrl.yaml | 357 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 366 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 389 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments 391 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 392 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 393 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 394 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 401 Pull down settings for 2 pull resistors, R0 and R1. Valid arguments 403 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 404 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. [all …]
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D | mediatek,mt8186-pinctrl.yaml | 116 description: mt8186 pull down PUPD/R0/R1 type define value. 124 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to 161 description: mt8186 pull up PUPD/R0/R1 type define value. 169 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
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D | mediatek,mt8188-pinctrl.yaml | 104 description: mt8188 pull down PUPD/R0/R1 type define value. 112 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to 130 description: mt8188 pull up PUPD/R0/R1 type define value. 138 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set
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/linux-6.6.21/arch/x86/crypto/ |
D | twofish-x86_64-asm_64.S | 29 #define R0 %rax macro 226 encrypt_round(R0,R1,R2,R3,0); 227 encrypt_round(R2,R3,R0,R1,8); 228 encrypt_round(R0,R1,R2,R3,2*8); 229 encrypt_round(R2,R3,R0,R1,3*8); 230 encrypt_round(R0,R1,R2,R3,4*8); 231 encrypt_round(R2,R3,R0,R1,5*8); 232 encrypt_round(R0,R1,R2,R3,6*8); 233 encrypt_round(R2,R3,R0,R1,7*8); 234 encrypt_round(R0,R1,R2,R3,8*8); [all …]
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D | twofish-i586-asm_32.S | 231 encrypt_round(R0,R1,R2,R3,0); 232 encrypt_round(R2,R3,R0,R1,8); 233 encrypt_round(R0,R1,R2,R3,2*8); 234 encrypt_round(R2,R3,R0,R1,3*8); 235 encrypt_round(R0,R1,R2,R3,4*8); 236 encrypt_round(R2,R3,R0,R1,5*8); 237 encrypt_round(R0,R1,R2,R3,6*8); 238 encrypt_round(R2,R3,R0,R1,7*8); 239 encrypt_round(R0,R1,R2,R3,8*8); 240 encrypt_round(R2,R3,R0,R1,9*8); [all …]
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D | poly1305-x86_64-cryptogams.pl | 2207 my ($R0,$R1,$R2,$R3,$R4, $S1,$S2,$S3,$S4) = map("%zmm$_",(16..24)); 2248 vmovdqu `16*0-64`($ctx),%x#$D0 # will become expanded ${R0} 2259 vpermd $D0,$T2,$R0 # 00003412 -> 14243444 2264 vmovdqa64 $R0,0x00(%rsp){%k2} # save in case $len%128 != 0 2265 vpsrlq \$32,$R0,$T0 # 14243444 -> 01020304 2290 vpmuludq $T0,$R0,$D0 # d0 = r0'*r0 2298 vpmuludq $T1,$R0,$M1 2313 vpmuludq $T2,$R0,$M2 2322 vpmuludq $T3,$R0,$M3 2333 vpmuludq $T4,$R0,$M4 [all …]
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/linux-6.6.21/arch/arm/crypto/ |
D | poly1305-armv4.pl | 495 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9)); 530 vdup.32 $R0,r2 @ r^1 in both lanes 554 vmull.u32 $D0,$R0,${R0}[1] 555 vmull.u32 $D1,$R1,${R0}[1] 556 vmull.u32 $D2,$R2,${R0}[1] 557 vmull.u32 $D3,$R3,${R0}[1] 558 vmull.u32 $D4,$R4,${R0}[1] 561 vmlal.u32 $D1,$R0,${R1}[1] 569 vmlal.u32 $D2,$R0,${R2}[1] 573 vmlal.u32 $D3,$R0,${R3}[1] [all …]
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/linux-6.6.21/arch/arm64/crypto/ |
D | poly1305-armv8.pl | 262 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8)); 513 ld1 {$R0,$R1,$S1,$R2},[x15],#64 577 umull $ACC0,$IN23_0,${R0}[2] 591 umlal $ACC1,$IN23_1,${R0}[2] 600 umlal $ACC2,$IN23_2,${R0}[2] 609 umlal $ACC3,$IN23_3,${R0}[2] 620 umlal $ACC4,$IN23_4,${R0}[2] 642 umlal $ACC2,$IN01_2,${R0}[0] 656 umlal $ACC0,$IN01_0,${R0}[0] 671 umlal $ACC1,$IN01_1,${R0}[0] [all …]
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/linux-6.6.21/arch/sh/kernel/cpu/sh3/ |
D | swsusp.S | 59 ! BL=0: R7->R0 is bank0 65 ! BL=1: R7->R0 is bank1 80 ! BL=0: R7->R0 is bank0 105 ! BL=0: R7->R0 is bank0 112 ! BL=1: R7->R0 is bank1 119 ! BL=0: R7->R0 is bank0
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/linux-6.6.21/drivers/tty/serial/ |
D | pmac_zilog.c | 162 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs() 163 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs() 230 write_zsreg(uap, R0, ERR_RES); in pmz_receive_chars() 303 ch = read_zsreg(uap, R0); in pmz_receive_chars() 319 status = read_zsreg(uap, R0); in pmz_status_handle() 320 write_zsreg(uap, R0, RES_EXT_INT); in pmz_status_handle() 353 unsigned char status = read_zsreg(uap, R0); in pmz_transmit_chars() 421 write_zsreg(uap, R0, RES_Tx_P); in pmz_transmit_chars() 448 write_zsreg(uap_a, R0, RES_H_IUS); in pmz_interrupt() 473 write_zsreg(uap_b, R0, RES_H_IUS); in pmz_interrupt() [all …]
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D | zs.c | 232 while ((read_zsreg(zport, R0) & Rx_CH_AV) && --loops) in zs_receive_drain() 242 while (!(read_zsreg(zport, R0) & Tx_BUF_EMP) && --loops) { in zs_transmit_drain() 324 status_a = read_zsreg(zport_a, R0); in zs_raw_get_ab_mctrl() 325 status_b = read_zsreg(zport_b, R0); in zs_raw_get_ab_mctrl() 421 write_zsreg(zport, R0, RES_Tx_P); in zs_raw_stop_tx() 498 write_zsreg(zport_a, R0, RES_EXT_INT); in zs_enable_ms() 548 avail = read_zsreg(zport, R0) & Rx_CH_AV; in zs_receive_chars() 573 write_zsreg(zport, R0, ERR_RES); in zs_receive_chars() 656 status = read_zsreg(zport, R0); in zs_status_handle() 693 write_zsreg(zport, R0, RES_EXT_INT); in zs_status_handle() [all …]
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/linux-6.6.21/arch/sh/math-emu/ |
D | math.c | 50 #define R0 (regs->regs[0]) macro 160 MREAD(FRn, Rm + R0 + 4); in fmov_idx_reg() 162 MREAD(FRn, Rm + R0); in fmov_idx_reg() 164 MREAD(FRn, Rm + R0); in fmov_idx_reg() 210 MWRITE(FRm, Rn + R0 + 4); in fmov_reg_idx() 212 MWRITE(FRm, Rn + R0); in fmov_reg_idx() 214 MWRITE(FRm, Rn + R0); in fmov_reg_idx()
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/linux-6.6.21/tools/perf/arch/arm/tests/ |
D | regs_load.S | 4 #define R0 0x00 macro 41 str r0, [r0, #R0]
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/linux-6.6.21/Documentation/bpf/standardization/ |
D | abi.rst | 19 * R0: return value from function calls, and exit value for BPF programs 24 R0 - R5 are scratch registers and BPF programs needs to spill/fill them if
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/linux-6.6.21/tools/perf/arch/powerpc/tests/ |
D | regs_load.S | 5 #define R0 0 macro 44 std 0, R0(3)
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/linux-6.6.21/arch/powerpc/mm/nohash/ |
D | tlb_low.S | 244 PPC_TLBILX_ALL(0,R0) 257 PPC_TLBILX_PID(0,R0) 309 PPC_TLBILX_PID(0,R0) 321 PPC_TLBILX_PID(0,R0) 328 PPC_TLBILX_ALL(0,R0)
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/linux-6.6.21/Documentation/bpf/ |
D | linux-notes.rst | 67 * Register R0 is an implicit output which contains the data fetched from 78 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + imm)) 84 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + src + imm))
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