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Searched refs:PP_ON_DELAYS (Results 1 – 6 of 6) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/i915/display/
Dintel_pps_regs.h58 #define PP_ON_DELAYS(pps_idx) _MMIO_PPS(pps_idx, _PP_ON_DELAYS) macro
Dintel_pps.c295 u32 port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(pipe)) & in vlv_initial_pps_pipe()
496 regs->pp_on = PP_ON_DELAYS(pps_idx); in intel_pps_get_registers()
1115 i915_reg_t pp_on_reg = PP_ON_DELAYS(pipe); in vlv_detach_power_sequencer()
1688 port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK; in assert_pps_unlocked()
1715 port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK; in assert_pps_unlocked()
Dintel_lvds.c166 val = intel_de_read(dev_priv, PP_ON_DELAYS(0)); in intel_lvds_pps_get_hw_state()
219 intel_de_write(dev_priv, PP_ON_DELAYS(0), in intel_lvds_pps_init_hw()
/linux-6.6.21/drivers/gpu/drm/gma500/
Dcdv_device.c261 regs->cdv.savePP_ON_DELAYS = REG_READ(PP_ON_DELAYS); in cdv_save_display_registers()
333 REG_WRITE(PP_ON_DELAYS, regs->cdv.savePP_ON_DELAYS); in cdv_restore_display_registers()
Dpsb_intel_reg.h184 #define PP_ON_DELAYS 0x61208 /* Cedartrail */ macro
Dcdv_intel_dp.c2029 pp_on = REG_READ(PP_ON_DELAYS); in cdv_intel_dp_init()