Searched refs:PMCR (Results 1 – 9 of 9) sorted by relevance
| /linux-6.6.21/arch/sh/kernel/cpu/sh4/ |
| D | perf_event.c | 17 #define PMCR(n) (PM_CR_BASE + ((n) * 0x04)) macro
212 tmp = __raw_readw(PMCR(idx)); in sh7750_pmu_disable()
214 __raw_writew(tmp, PMCR(idx)); in sh7750_pmu_disable()
219 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); in sh7750_pmu_enable()
220 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx)); in sh7750_pmu_enable()
228 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); in sh7750_pmu_disable_all()
236 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); in sh7750_pmu_enable_all()
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| /linux-6.6.21/arch/arm/include/asm/ |
| D | arm_pmuv3.h | 14 #define PMCR __ACCESS_CP15(c9, 0, c12, 0) macro
132 write_sysreg(val, PMCR); in write_pmcr()
137 return read_sysreg(PMCR); in read_pmcr()
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| /linux-6.6.21/arch/arm/mach-sa1100/ |
| D | sleep.S | 110 ldr r12, =PMCR
139 @ Step 6 set force sleep bit in PMCR
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| D | generic.c | 91 PMCR = PMCR_SF; in sa1100_power_off()
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| /linux-6.6.21/arch/arm/mach-pxa/ |
| D | pxa3xx-regs.h | 26 #define PMCR __REG(0x40F50000) /* Power Manager Control Register */ macro
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| D | pxa2xx-regs.h | 20 #define PMCR __REG(0x40F00000) /* Power Manager Control Register */ macro
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| D | spitz.c | 1003 PMCR = 0x00; in spitz_init()
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| /linux-6.6.21/drivers/perf/arm_cspmu/ |
| D | arm_cspmu.c | 57 #define PMCR 0xE04 macro
515 writel(pmcr, cspmu->base0 + PMCR); in arm_cspmu_reset_counters()
520 writel(PMCR_E, cspmu->base0 + PMCR); in arm_cspmu_start_counters()
525 writel(0, cspmu->base0 + PMCR); in arm_cspmu_stop_counters()
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| /linux-6.6.21/arch/arm/mach-sa1100/include/mach/ |
| D | SA-1100.h | 884 #define PMCR __REG(0x90020000) /* PM Control Reg. */ macro
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