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Searched refs:CSR_DMW0_BASE (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/arch/loongarch/include/asm/
Daddrspace.h28 #define IO_BASE CSR_DMW0_BASE
36 #define UNCACHE_BASE CSR_DMW0_BASE
Defi.h21 #define EFI_RT_VIRTUAL_OFFSET CSR_DMW0_BASE
Dloongarch.h862 #define CSR_DMW0_BASE (CSR_DMW0_VSEG << DMW_PABITS) macro
863 #define CSR_DMW0_INIT (CSR_DMW0_BASE | CSR_DMW0_PLV0)
/linux-6.6.21/arch/loongarch/mm/
Dcache.c47 uint64_t addr = CSR_DMW0_BASE; in flush_cache_leaf()