/linux-6.6.21/arch/arm/mach-omap1/ |
D | clock_data.c | 603 CLK(NULL, "ck_ref", &ck_ref.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), 604 CLK(NULL, "ck_dpll1", &ck_dpll1.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), 606 CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk.hw, CK_16XX), 607 CLK(NULL, "ck_sossi", &sossi_ck.hw, CK_16XX), 608 CLK(NULL, "arm_ck", &arm_ck.hw, CK_16XX | CK_1510 | CK_310), 609 CLK(NULL, "armper_ck", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310), 610 CLK("omap_gpio.0", "ick", &arm_gpio_ck.hw, CK_1510 | CK_310), 611 CLK(NULL, "armxor_ck", &armxor_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), 612 CLK(NULL, "armtim_ck", &armtim_ck.clk.hw, CK_16XX | CK_1510 | CK_310), 613 CLK("omap_wdt", "fck", &armwdt_ck.clk.hw, CK_16XX | CK_1510 | CK_310), [all …]
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D | clock.h | 25 #define CLK(dev, con, ck, cp) \ macro
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/linux-6.6.21/drivers/gpu/drm/sprd/ |
D | megacores_pll.c | 17 #define CLK 0 macro 131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg() 137 regmap_write(regmap, 0x90, val[CLK]); in dphy_set_timing_reg() 144 regmap_write(regmap, 0x32, val[CLK]); in dphy_set_timing_reg() 150 regmap_write(regmap, 0x91, val[CLK]); in dphy_set_timing_reg() 157 regmap_write(regmap, 0x33, val[CLK]); in dphy_set_timing_reg() 163 regmap_write(regmap, 0x92, val[CLK]); in dphy_set_timing_reg() 170 regmap_write(regmap, 0x34, val[CLK]); in dphy_set_timing_reg() 176 regmap_write(regmap, 0x93, val[CLK]); in dphy_set_timing_reg() 183 regmap_write(regmap, 0x36, val[CLK]); in dphy_set_timing_reg() [all …]
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/linux-6.6.21/arch/arm/boot/dts/st/ |
D | ste-dbx5x0-pinctrl.dtsi | 267 pins = "GPIO23_AA4"; /* CLK */ 300 pins = "GPIO23_AA4"; /* CLK */ 315 pins = "GPIO23_AA4"; /* CLK */ 341 pins = "GPIO23_AA4"; /* CLK */ 355 pins = "GPIO208_AH16"; /* CLK */ 375 pins = "GPIO208_AH16"; /* CLK */ 396 pins = "GPIO208_AH16"; /* CLK */ 412 pins = "GPIO208_AH16"; /* CLK */ 435 pins = "GPIO128_A5"; /* CLK */ 459 pins = "GPIO128_A5"; /* CLK */ [all …]
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D | ste-href-family-pinctrl.dtsi | 29 "GPIO217_AH12"; /* CLK */ 49 pins = "GPIO217_AH12"; /* CLK */ 66 pins = "GPIO217_AH12"; /* CLK */
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D | stm32f7-pinctrl.dtsi | 241 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1 CLK */ 254 <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1 CLK */ 272 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */ 285 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC2 CLK */
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/linux-6.6.21/Documentation/devicetree/bindings/display/ti/ |
D | ti,omap5-dss.txt | 77 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-, 99 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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D | ti,omap4-dss.txt | 96 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-, 118 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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D | ti,dra7-dss.txt | 73 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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D | ti,omap3-dss.txt | 86 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
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/linux-6.6.21/drivers/gpu/drm/msm/dsi/ |
D | mmss_cc.xml.h | 57 CLK = 0, enumerator 66 case CLK: return 0x0000004c; in __offset_CLK()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/ |
D | ddc_regs.h | 158 DDC_REG_LIST(CLK, id)\ 168 DDC_VGA_REG_LIST(CLK)\ 187 DDC_REG_LIST_DCN2(CLK, id)\
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/linux-6.6.21/Documentation/devicetree/bindings/media/ |
D | renesas,drif.yaml | 18 | |-----SCK------->|CLK | 26 CLK & SYNC. Each internal channel has its own dedicated resources like 31 The internal channels sharing the CLK & SYNC are tied together by their 162 # | |-----SCK------->|CLK | 219 # | |-----SCK------->|CLK |
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/linux-6.6.21/arch/arm64/boot/dts/amlogic/ |
D | meson-gxl-s905x-khadas-vim.dts | 185 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", 194 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD", 197 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
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D | meson-gxbb-nanopi-k2.dts | 262 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", 281 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD", 284 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
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/linux-6.6.21/Documentation/devicetree/bindings/hwmon/ |
D | g762.txt | 8 on CLK pin of the chip.
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/linux-6.6.21/arch/arm/boot/dts/allwinner/ |
D | sun8i-h2-plus-bananapi-m2-zero.dts | 234 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3", 241 "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
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D | sun7i-a20-bananapi.dts | 229 "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3", 246 "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI",
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D | sun6i-a31s-sinovoip-bpi-m2.dts | 281 "", "", "", "", "", "", "WL-SDIO-CMD", "WL-SDIO-CLK", 302 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
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/linux-6.6.21/Documentation/devicetree/bindings/sound/ |
D | microchip,sama7g5-pdmc.yaml | 52 or falling) of the CLK line. A microphone is represented as a pair of DS
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn32/ |
D | hw_factory_dcn32.c | 139 DDC_GPIO_VGA_REG_LIST(CLK),
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
D | hw_factory_dcn20.c | 128 DDC_GPIO_VGA_REG_LIST(CLK),
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
D | hw_factory_dcn30.c | 135 DDC_GPIO_VGA_REG_LIST(CLK),
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn315/ |
D | hw_factory_dcn315.c | 129 DDC_GPIO_VGA_REG_LIST(CLK),
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/linux-6.6.21/arch/arm64/boot/dts/mediatek/ |
D | mt7622-rfb1.dts | 252 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively 396 * DAT2, DAT3, CMD, CLK for SD respectively.
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