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Searched refs:ufshcd_writel (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/ufs/core/
Dufshcd-crypto.c35 ufshcd_writel(hba, 0, slot_offset + 16 * sizeof(cfg->reg_val[0])); in ufshcd_program_key()
37 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[i]), in ufshcd_program_key()
41 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[17]), in ufshcd_program_key()
44 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[16]), in ufshcd_program_key()
Dufshcd.c771 ufshcd_writel(hba, ~mask, REG_UTP_TRANSFER_REQ_LIST_CLEAR); in ufshcd_utrl_clear()
782 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR); in ufshcd_utmrl_clear()
784 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR); in ufshcd_utmrl_clear()
882 ufshcd_writel(hba, INT_AGGR_ENABLE | in ufshcd_reset_intr_aggr()
896 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE | in ufshcd_config_intr_aggr()
908 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL); in ufshcd_disable_intr_aggr()
919 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT, in ufshcd_enable_run_stop_reg()
921 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT, in ufshcd_enable_run_stop_reg()
936 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE); in ufshcd_hba_start()
2157 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL); in ufshcd_send_command()
[all …]
/linux-6.1.9/drivers/ufs/host/
Dufs-mediatek.c219 ufshcd_writel(hba, 0, in ufs_mtk_hce_enable_notify()
229 ufshcd_writel(hba, in ufs_mtk_hce_enable_notify()
288 ufshcd_writel(hba, REFCLK_REQUEST, REG_UFS_REFCLK_CTRL); in ufs_mtk_setup_ref_clk()
291 ufshcd_writel(hba, REFCLK_RELEASE, REG_UFS_REFCLK_CTRL); in ufs_mtk_setup_ref_clk()
343 ufshcd_writel(hba, 0x820820, REG_UFS_DEBUG_SEL); in ufs_mtk_dbg_sel()
344 ufshcd_writel(hba, 0x0, REG_UFS_DEBUG_SEL_B0); in ufs_mtk_dbg_sel()
345 ufshcd_writel(hba, 0x55555555, REG_UFS_DEBUG_SEL_B1); in ufs_mtk_dbg_sel()
346 ufshcd_writel(hba, 0xaaaaaaaa, REG_UFS_DEBUG_SEL_B2); in ufs_mtk_dbg_sel()
347 ufshcd_writel(hba, 0xffffffff, REG_UFS_DEBUG_SEL_B3); in ufs_mtk_dbg_sel()
349 ufshcd_writel(hba, 0x20, REG_UFS_DEBUG_SEL); in ufs_mtk_dbg_sel()
[all …]
Dcdns-pltfrm.c135 ufshcd_writel(hba, core_clk_div, CDNS_UFS_REG_HCLKDIV); in cdns_ufs_set_hclkdiv()
247 ufshcd_writel(hba, data, CDNS_UFS_REG_PHY_XCFGD1); in cdns_ufs_m31_16nm_phy_initialization()
Dufshcd-dwc.c46 ufshcd_writel(hba, divider_val, DWC_UFS_REG_HCLKDIV); in ufshcd_dwc_program_clk_div()
Dufs-renesas.c291 ufshcd_writel(hba, save[p->index], p->reg); in ufs_renesas_reg_control()
315 ufshcd_writel(hba, p->u.val, p->reg); in ufs_renesas_reg_control()
Dufs-qcom.c333 ufshcd_writel(hba, in ufs_qcom_enable_hw_clk_gating()
430 ufshcd_writel(hba, core_clk_cycles_per_us, REG_UFS_SYS1CLK_1US); in ufs_qcom_cfg_timers()
492 ufshcd_writel(hba, core_clk_period_in_ns | tx_clk_cycles_per_us, in ufs_qcom_cfg_timers()
502 ufshcd_writel(hba, ((core_clk_rate / MSEC_PER_SEC) * 100), in ufs_qcom_cfg_timers()
1223 ufshcd_writel(hba, reg, REG_UFS_CFG1); in ufs_qcom_print_hw_debug_reg_all()
Dufs-hisi.c232 ufshcd_writel(hba, UFS_HCLKDIV_NORMAL_VALUE, UFS_REG_HCLKDIV); in ufs_hisi_link_startup_pre_change()
237 ufshcd_writel(hba, reg, REG_AUTO_HIBERNATE_IDLE_TIMER); in ufs_hisi_link_startup_pre_change()
Dufshcd-pci.c105 ufshcd_writel(hba, hce, REG_CONTROLLER_ENABLE); in ufs_intel_hce_enable_notify()
Dufs-exynos.c302 ufshcd_writel(hba, MH_MSG(enabled_vh, MH_MSG_PH_READY), PH2VH_MBOX); in exynosauto_ufs_post_pwr_change()
/linux-6.1.9/include/ufs/
Dufshcd.h1037 #define ufshcd_writel(hba, val, reg) \ macro
1056 ufshcd_writel(hba, tmp, reg); in ufshcd_rmwl()