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Searched refs:set_reg_field_value (Results 1 – 25 of 33) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce110/ !
Ddce110_opp_csc_v.c119 set_reg_field_value( in program_color_matrix_v()
130 set_reg_field_value( in program_color_matrix_v()
136 set_reg_field_value( in program_color_matrix_v()
148 set_reg_field_value( in program_color_matrix_v()
154 set_reg_field_value( in program_color_matrix_v()
166 set_reg_field_value( in program_color_matrix_v()
172 set_reg_field_value( in program_color_matrix_v()
184 set_reg_field_value( in program_color_matrix_v()
190 set_reg_field_value( in program_color_matrix_v()
202 set_reg_field_value( in program_color_matrix_v()
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Ddce110_opp_regamma_v.c42 set_reg_field_value( in power_on_lut()
48 set_reg_field_value( in power_on_lut()
55 set_reg_field_value( in power_on_lut()
61 set_reg_field_value( in power_on_lut()
91 set_reg_field_value( in set_bypass_input_gamma()
105 set_reg_field_value( in configure_regamma_mode()
137 set_reg_field_value( in regamma_config_regions_and_segments()
143 set_reg_field_value( in regamma_config_regions_and_segments()
154 set_reg_field_value( in regamma_config_regions_and_segments()
165 set_reg_field_value( in regamma_config_regions_and_segments()
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Ddce110_timing_generator.c114 set_reg_field_value(regval, early_cntl, in dce110_timing_generator_set_early_control()
134 set_reg_field_value( in dce110_timing_generator_enable_crtc()
159 set_reg_field_value( in dce110_timing_generator_program_blank_color()
164 set_reg_field_value( in dce110_timing_generator_program_blank_color()
169 set_reg_field_value( in dce110_timing_generator_program_blank_color()
264 set_reg_field_value(regval, 0, CRTC_COUNT_CONTROL, in program_horz_count_by_2()
268 set_reg_field_value(regval, 1, CRTC_COUNT_CONTROL, in program_horz_count_by_2()
390 set_reg_field_value(v_total_max, in dce110_timing_generator_set_drr()
395 set_reg_field_value(v_total_min, in dce110_timing_generator_set_drr()
400 set_reg_field_value(v_total_cntl, in dce110_timing_generator_set_drr()
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Ddce110_mem_input_v.c49 set_reg_field_value(value, 1, in set_flip_control()
70 set_reg_field_value(value, temp, in program_pri_addr_c()
84 set_reg_field_value(value, temp, in program_pri_addr_c()
106 set_reg_field_value(value, temp, in program_pri_addr_l()
120 set_reg_field_value(value, temp, in program_pri_addr_l()
159 set_reg_field_value(value, 1, UNP_GRPH_ENABLE, GRPH_ENABLE); in enable()
172 set_reg_field_value(value, info->gfx8.num_banks, in program_tiling()
175 set_reg_field_value(value, info->gfx8.bank_width, in program_tiling()
178 set_reg_field_value(value, info->gfx8.bank_height, in program_tiling()
181 set_reg_field_value(value, info->gfx8.tile_aspect, in program_tiling()
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Ddce110_transform_v.c89 set_reg_field_value( in program_viewport()
94 set_reg_field_value( in program_viewport()
103 set_reg_field_value( in program_viewport()
108 set_reg_field_value( in program_viewport()
119 set_reg_field_value( in program_viewport()
124 set_reg_field_value( in program_viewport()
133 set_reg_field_value( in program_viewport()
138 set_reg_field_value( in program_viewport()
165 set_reg_field_value(value, data->taps.h_taps - 1, in setup_scaling_configuration()
167 set_reg_field_value(value, data->taps.v_taps - 1, in setup_scaling_configuration()
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Ddce110_timing_generator_v.c62 set_reg_field_value(value, 0, in dce110_timing_generator_v_enable_crtc()
72 set_reg_field_value(value, 1, in dce110_timing_generator_v_enable_crtc()
86 set_reg_field_value(value, 0, in dce110_timing_generator_v_disable_crtc()
88 set_reg_field_value(value, 0, in dce110_timing_generator_v_disable_crtc()
104 set_reg_field_value( in dce110_timing_generator_v_blank_crtc()
110 set_reg_field_value( in dce110_timing_generator_v_blank_crtc()
124 set_reg_field_value( in dce110_timing_generator_v_unblank_crtc()
130 set_reg_field_value( in dce110_timing_generator_v_unblank_crtc()
260 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
269 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
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Ddce110_compressor.c87 set_reg_field_value(value, 3, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL); in reset_lb_on_vblank()
88 set_reg_field_value(value, 1, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2); in reset_lb_on_vblank()
104 set_reg_field_value(value, 2, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL); in reset_lb_on_vblank()
105 set_reg_field_value(value, 0, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2); in reset_lb_on_vblank()
146 set_reg_field_value(value, 0, FBC_CNTL, FBC_GRPH_COMP_EN); in dce110_compressor_power_up_fbc()
147 set_reg_field_value(value, 1, FBC_CNTL, FBC_EN); in dce110_compressor_power_up_fbc()
148 set_reg_field_value(value, 2, FBC_CNTL, FBC_COHERENCY_MODE); in dce110_compressor_power_up_fbc()
151 set_reg_field_value( in dce110_compressor_power_up_fbc()
161 set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_RLE_EN); in dce110_compressor_power_up_fbc()
162 set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_DPCM4_RGB_EN); in dce110_compressor_power_up_fbc()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/ !
Ddce_audio.c296 set_reg_field_value(value, capable, in set_high_bit_rate_capable()
315 set_reg_field_value(value, latency_in_ms, in set_video_latency()
338 set_reg_field_value(value, latency_in_ms, in set_audio_latency()
351 set_reg_field_value(value, 1, in dce_aud_az_enable()
354 set_reg_field_value(value, 1, in dce_aud_az_enable()
359 set_reg_field_value(value, 0, in dce_aud_az_enable()
374 set_reg_field_value(value, 1, in dce_aud_az_disable()
379 set_reg_field_value(value, 0, in dce_aud_az_disable()
384 set_reg_field_value(value, 0, in dce_aud_az_disable()
411 set_reg_field_value(value, 1, in dce_aud_az_configure()
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Ddce_link_encoder.c633 set_reg_field_value(value, hpd_source, AUX_CONTROL, AUX_HPD_SEL); in aux_initialize()
634 set_reg_field_value(value, 0, AUX_CONTROL, AUX_LS_READ_EN); in aux_initialize()
641 set_reg_field_value(value, 1, in aux_initialize()
1652 set_reg_field_value(value, 1, DC_HPD_CONTROL, DC_HPD_EN); in dce110_link_encoder_enable_hpd()
1662 set_reg_field_value(value, 0, DC_HPD_CONTROL, DC_HPD_EN); in dce110_link_encoder_disable_hpd()
Ddce_aux.c126 set_reg_field_value( in acquire_engine()
134 set_reg_field_value( in acquire_engine()
149 set_reg_field_value( in acquire_engine()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce112/ !
Ddce112_compressor.c119 set_reg_field_value( in lpt_memory_control_config()
126 set_reg_field_value( in lpt_memory_control_config()
150 set_reg_field_value( in lpt_memory_control_config()
157 set_reg_field_value( in lpt_memory_control_config()
164 set_reg_field_value( in lpt_memory_control_config()
171 set_reg_field_value( in lpt_memory_control_config()
197 set_reg_field_value( in lpt_memory_control_config()
204 set_reg_field_value( in lpt_memory_control_config()
233 set_reg_field_value( in lpt_memory_control_config()
240 set_reg_field_value( in lpt_memory_control_config()
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Ddce112_hw_sequencer.c91 set_reg_field_value( in dce112_init_pte()
97 set_reg_field_value( in dce112_init_pte()
103 set_reg_field_value( in dce112_init_pte()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce80/ !
Ddce80_timing_generator.c99 set_reg_field_value( in program_pix_dur()
133 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
139 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
147 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
152 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
158 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
163 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
170 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
176 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce60/ !
Ddce60_timing_generator.c99 set_reg_field_value( in program_pix_dur()
139 set_reg_field_value( in dce60_timing_generator_enable_advanced_request()
144 set_reg_field_value( in dce60_timing_generator_enable_advanced_request()
150 set_reg_field_value( in dce60_timing_generator_enable_advanced_request()
155 set_reg_field_value( in dce60_timing_generator_enable_advanced_request()
162 set_reg_field_value( in dce60_timing_generator_enable_advanced_request()
168 set_reg_field_value( in dce60_timing_generator_enable_advanced_request()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce120/ !
Ddce120_hw_sequencer.c127 set_reg_field_value(
133 set_reg_field_value(
139 set_reg_field_value(
Ddce120_timing_generator.c418 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce120_timing_generator_disable_vga()
419 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce120_timing_generator_disable_vga()
420 set_reg_field_value( in dce120_timing_generator_disable_vga()
422 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce120_timing_generator_disable_vga()
635 set_reg_field_value( in dce120_timing_generator_enable_advanced_request()
647 set_reg_field_value( in dce120_timing_generator_enable_advanced_request()
936 set_reg_field_value( in dce120_timing_generator_set_test_pattern()
946 set_reg_field_value( in dce120_timing_generator_set_test_pattern()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce80/ !
Dirq_service_dce80.c56 set_reg_field_value( in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce120/ !
Dirq_service_dce120.c56 set_reg_field_value( in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/ !
Ddm_services.h111 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ macro
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce60/ !
Dirq_service_dce60.c65 set_reg_field_value( in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dcn303/ !
Dirq_service_dcn303.c71 set_reg_field_value(value, current_status ? 0 : 1, HPD0_DC_HPD_INT_CONTROL, DC_HPD_INT_POLARITY); in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dcn201/ !
Dirq_service_dcn201.c101 set_reg_field_value( in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dcn10/ !
Dirq_service_dcn10.c148 set_reg_field_value( in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dcn20/ !
Dirq_service_dcn20.c151 set_reg_field_value( in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce110/ !
Dirq_service_dce110.c55 set_reg_field_value(value, current_status ? 0 : 1, in hpd_ack()

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