| /linux-6.1.9/drivers/clk/actions/ |
| D | owl-composite.c | 147 .set_parent = owl_comp_set_parent,
164 .set_parent = owl_comp_set_parent,
193 .set_parent = owl_comp_set_parent,
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| D | owl-mux.c | 58 .set_parent = owl_mux_set_parent,
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| /linux-6.1.9/drivers/clk/ |
| D | clk-composite.c | 30 return mux_ops->set_parent(mux_hw, index); in clk_composite_set_parent()
84 mux_hw && mux_ops && mux_ops->set_parent) { in clk_composite_determine_rate()
192 mux_ops->set_parent(mux_hw, index); in clk_composite_set_rate_and_parent()
194 mux_ops->set_parent(mux_hw, index); in clk_composite_set_rate_and_parent()
272 if (mux_ops->set_parent) in __clk_hw_register_composite()
273 clk_composite_ops->set_parent = clk_composite_set_parent; in __clk_hw_register_composite()
307 if (mux_ops->set_parent && rate_ops->set_rate) in __clk_hw_register_composite()
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| /linux-6.1.9/drivers/clk/tegra/ |
| D | clk-tegra-super-cclk.c | 40 return tegra_clk_super_ops.set_parent(hw, index); in cclk_super_set_parent()
111 .set_parent = cclk_super_set_parent,
119 .set_parent = cclk_super_set_parent,
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| D | clk-periph.c | 33 return mux_ops->set_parent(mux_hw, index); in clk_periph_set_parent()
131 .set_parent = clk_periph_set_parent,
144 .set_parent = clk_periph_set_parent,
154 .set_parent = clk_periph_set_parent,
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| D | clk-super.c | 140 .set_parent = clk_super_set_parent,
193 .set_parent = clk_super_set_parent,
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| /linux-6.1.9/drivers/clk/mediatek/ |
| D | clk-mux.c | 142 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
152 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
290 ret = mux_nb->ops->set_parent(hw, mux_nb->bypass_index); in mtk_clk_mux_notifier_cb()
294 ret = mux_nb->ops->set_parent(hw, mux_nb->original_index); in mtk_clk_mux_notifier_cb()
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| /linux-6.1.9/drivers/clk/ti/ |
| D | dpll.c | 30 .set_parent = &omap3_noncore_dpll_set_parent,
55 .set_parent = &omap3_noncore_dpll_set_parent,
68 .set_parent = &omap3_noncore_dpll_set_parent,
109 .set_parent = &omap3_noncore_dpll_set_parent,
121 .set_parent = &omap3_noncore_dpll_set_parent,
133 .set_parent = &omap3_noncore_dpll_set_parent,
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| /linux-6.1.9/drivers/clk/versatile/ |
| D | clk-sp810.c | 67 .set_parent = clk_sp810_timerclken_set_parent,
128 init.ops->set_parent(&sp810->timerclken[i].hw, 1); in clk_sp810_of_setup()
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| /linux-6.1.9/drivers/gpu/drm/mcde/ |
| D | mcde_clk_div.c | 45 unsigned long *prate, bool set_parent) in mcde_clk_div_choose_div() argument
56 if (set_parent) in mcde_clk_div_choose_div()
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| /linux-6.1.9/drivers/clk/pxa/ |
| D | clk-pxa.h | 24 .set_parent = dummy_clk_set_parent, \
75 .set_parent = name ## _set_parent, \
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| /linux-6.1.9/drivers/clk/qcom/ |
| D | clk-rcg.c | 825 .set_parent = clk_rcg_set_parent,
836 .set_parent = clk_rcg_set_parent,
847 .set_parent = clk_rcg_set_parent,
858 .set_parent = clk_rcg_set_parent,
870 .set_parent = clk_rcg_set_parent,
882 .set_parent = clk_rcg_set_parent,
894 .set_parent = clk_rcg_set_parent,
906 .set_parent = clk_dyn_rcg_set_parent,
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| D | clk-rcg2.c | 489 .set_parent = clk_rcg2_set_parent,
502 .set_parent = clk_rcg2_set_parent,
515 .set_parent = clk_rcg2_set_parent,
638 .set_parent = clk_rcg2_set_parent,
696 .set_parent = clk_rcg2_set_parent,
766 .set_parent = clk_rcg2_set_parent,
857 .set_parent = clk_rcg2_set_parent,
971 .set_parent = clk_rcg2_set_parent,
1149 .set_parent = clk_rcg2_shared_set_parent,
1412 .set_parent = clk_rcg2_set_parent,
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| D | clk-regmap-mux.c | 54 .set_parent = mux_set_parent,
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| /linux-6.1.9/drivers/sh/clk/ |
| D | core.c | 523 if (clk->ops->set_parent) in clk_set_parent()
524 ret = clk->ops->set_parent(clk, parent); in clk_set_parent()
580 if (likely(clkp->ops->set_parent)) in clks_core_resume()
581 clkp->ops->set_parent(clkp, in clks_core_resume()
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| /linux-6.1.9/drivers/clk/imx/ |
| D | clk-busy.c | 143 ret = busy->mux_ops->set_parent(&busy->mux.hw, index); in clk_busy_mux_set_parent()
152 .set_parent = clk_busy_mux_set_parent,
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| /linux-6.1.9/sound/soc/codecs/ |
| D | tlv320aic32x4-clk.c | 271 .set_parent = clk_aic32x4_pll_set_parent,
295 .set_parent = clk_aic32x4_codec_clkin_set_parent,
382 .set_parent = clk_aic32x4_bdiv_set_parent,
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| /linux-6.1.9/drivers/clk/rockchip/ |
| D | clk-pll.c | 209 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
243 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
442 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
478 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
691 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3399_pll_set_params()
727 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3399_pll_set_params()
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| D | clk-muxgrf.c | 52 .set_parent = rockchip_muxgrf_set_parent,
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| /linux-6.1.9/drivers/clk/socfpga/ |
| D | clk-gate.c | 168 .set_parent = socfpga_clk_set_parent,
238 ops->set_parent = NULL; in socfpga_gate_init()
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| /linux-6.1.9/drivers/clk/sprd/ |
| D | composite.c | 54 .set_parent = sprd_comp_set_parent,
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| D | mux.c | 73 .set_parent = sprd_mux_set_parent,
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| /linux-6.1.9/drivers/clk/at91/ |
| D | clk-i2s-mux.c | 47 .set_parent = clk_i2s_mux_set_parent,
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| /linux-6.1.9/drivers/clk/uniphier/ |
| D | clk-uniphier-mux.c | 52 .set_parent = uniphier_clk_mux_set_parent,
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| D | clk-uniphier-cpugear.c | 72 .set_parent = uniphier_clk_cpugear_set_parent,
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