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Searched refs:mmUVD_LMI_RBC_IB_64BIT_BAR_LOW (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_5_0_d.h40 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW 0x3c67 macro
Duvd_6_0_d.h51 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW 0x3c67 macro
Duvd_7_0_offset.h112 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h238 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW macro
Dvcn_2_5_offset.h853 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW macro
Dvcn_2_0_0_offset.h956 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW macro
Dvcn_3_0_0_offset.h1267 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c559 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0)); in uvd_v5_0_ring_emit_ib()
Duvd_v6_0.c1028 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0)); in uvd_v6_0_ring_emit_ib()
Duvd_v7_0.c1328 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_LMI_RBC_IB_64BIT_BAR_LOW), 0)); in uvd_v7_0_ring_emit_ib()
Dvcn_v1_0.c1517 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_RBC_IB_64BIT_BAR_LOW), 0)); in vcn_v1_0_dec_ring_emit_ib()