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Searched refs:mmSPI_GDBG_WAVE_CNTL (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v10_3.c668 mmSPI_GDBG_WAVE_CNTL));
674 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
679 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), orig_stall_vmid);
705 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));
707 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
716 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));
718 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
744 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));
749 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h1420 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
Dgfx_7_2_d.h1437 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
Dgfx_8_0_d.h1616 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
Dgfx_8_1_d.h1584 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2715 #define mmSPI_GDBG_WAVE_CNTL macro
Dgc_9_2_1_offset.h2901 #define mmSPI_GDBG_WAVE_CNTL macro
Dgc_10_3_0_offset.h4850 #define mmSPI_GDBG_WAVE_CNTL macro