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Searched refs:mmPLL_MACRO_CNTL_RESERVED0_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h725 #define mmPLL_MACRO_CNTL_RESERVED0_BASE_IDX … macro
Ddcn_2_1_0_offset.h367 #define mmPLL_MACRO_CNTL_RESERVED0_BASE_IDX … macro
Ddcn_2_0_0_offset.h377 #define mmPLL_MACRO_CNTL_RESERVED0_BASE_IDX … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h127 #define mmPLL_MACRO_CNTL_RESERVED0_BASE_IDX … macro