Home
last modified time | relevance | path

Searched refs:mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h1473 #define mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
Ddcn_2_1_0_offset.h1029 #define mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h1067 #define mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h309 #define mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro