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Searched refs:mmCP_MES_DC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dmes_v10_1.c568 data = RREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL); in mes_v10_1_enable()
571 WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data); in mes_v10_1_enable()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h7741 #define mmCP_MES_DC_OP_CNTL macro
Dgc_10_3_0_offset.h7380 #define mmCP_MES_DC_OP_CNTL macro