Searched refs:mi2s_bit_clk (Results 1 – 5 of 5) sorted by relevance
94 ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_startup()128 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()131 clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()288 ret = clk_set_rate(drvdata->mi2s_bit_clk[id], in lpass_cpu_daiops_hw_params()334 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_trigger()359 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_trigger()397 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_prepare()1216 drvdata->mi2s_bit_clk[dai_id] = devm_clk_get(dev, in asoc_qcom_lpass_cpu_platform_probe()1218 if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { in asoc_qcom_lpass_cpu_platform_probe()1222 PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); in asoc_qcom_lpass_cpu_platform_probe()[all …]
103 struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS]; member
203 static struct clk_regmap_mux mi2s_bit_clk = { variable407 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
178 static struct clk_regmap_mux mi2s_bit_clk = { variable486 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
401 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,