Searched refs:ixCG_CLKPIN_CNTL (Results 1 – 11 of 11) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | fiji_baco.c | 100 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL },
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| D | polaris_baco.c | 103 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL },
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| D | tonga_baco.c | 108 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL },
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| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | vi.c | 556 tmp = RREG32_SMC(ixCG_CLKPIN_CNTL); in vi_get_xclk()
1235 orig = data = RREG32_SMC(ixCG_CLKPIN_CNTL); in vi_program_aspm()
1238 WREG32_SMC(ixCG_CLKPIN_CNTL, data); in vi_program_aspm()
1243 WREG32_SMC(ixCG_CLKPIN_CNTL, data); in vi_program_aspm()
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| D | cik.c | 925 if (RREG32_SMC(ixCG_CLKPIN_CNTL) & CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK) in cik_get_xclk()
1838 orig = data = RREG32_SMC(ixCG_CLKPIN_CNTL); in cik_program_aspm()
1841 WREG32_SMC(ixCG_CLKPIN_CNTL, data); in cik_program_aspm()
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| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| D | smu_7_0_0_d.h | 56 #define ixCG_CLKPIN_CNTL 0xc05001a0 macro
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| D | smu_7_1_1_d.h | 56 #define ixCG_CLKPIN_CNTL 0xc05001a0 macro
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| D | smu_7_0_1_d.h | 57 #define ixCG_CLKPIN_CNTL 0xc05001a0 macro
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| D | smu_7_1_2_d.h | 57 #define ixCG_CLKPIN_CNTL 0xc05001a0 macro
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| D | smu_7_1_3_d.h | 60 #define ixCG_CLKPIN_CNTL 0xc05001a0 macro
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| D | smu_7_1_0_d.h | 56 #define ixCG_CLKPIN_CNTL 0xc05001a0 macro
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