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Searched refs:full_recout_width (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c728 …ull_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio_c * pipe_param->dest.full_recout_width; in get_surf_rq_param()
731 … full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio * pipe_param->dest.full_recout_width; in get_surf_rq_param()
956 unsigned int full_recout_width; in dml_rq_dlg_get_dlg_params() local
1258 full_recout_width = 0; in dml_rq_dlg_get_dlg_params()
1263 if (dst->full_recout_width == 0 && !dst->odm_combine) { in dml_rq_dlg_get_dlg_params()
1267 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params()
1269 full_recout_width = dst->full_recout_width; in dml_rq_dlg_get_dlg_params()
1271 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
1279 full_recout_width, in dml_rq_dlg_get_dlg_params()
1291 full_recout_width, in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c696 …ull_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio_c * pipe_param->dest.full_recout_width; in get_surf_rq_param()
699 … full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio * pipe_param->dest.full_recout_width; in get_surf_rq_param()
1021 unsigned int full_recout_width = 0; in dml_rq_dlg_get_dlg_params() local
1359 full_recout_width = 0; in dml_rq_dlg_get_dlg_params()
1364 if (dst->full_recout_width == 0 && !dst->odm_combine) { in dml_rq_dlg_get_dlg_params()
1367 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params()
1369 full_recout_width = dst->full_recout_width; in dml_rq_dlg_get_dlg_params()
1371 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
1378 full_recout_width, in dml_rq_dlg_get_dlg_params()
1389 full_recout_width, in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c910 unsigned int full_recout_width; in dml20_rq_dlg_get_dlg_params() local
1206 full_recout_width = 0; in dml20_rq_dlg_get_dlg_params()
1211 if (dst->full_recout_width == 0 && !dst->odm_combine) { in dml20_rq_dlg_get_dlg_params()
1214 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml20_rq_dlg_get_dlg_params()
1216 full_recout_width = dst->full_recout_width; in dml20_rq_dlg_get_dlg_params()
1218 full_recout_width = dst->recout_width; in dml20_rq_dlg_get_dlg_params()
1225 full_recout_width, in dml20_rq_dlg_get_dlg_params()
1236 full_recout_width, in dml20_rq_dlg_get_dlg_params()
1245 full_recout_width); in dml20_rq_dlg_get_dlg_params()
1261 full_recout_width, in dml20_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_20v2.c910 unsigned int full_recout_width; in dml20v2_rq_dlg_get_dlg_params() local
1207 full_recout_width = 0; in dml20v2_rq_dlg_get_dlg_params()
1212 if (dst->full_recout_width == 0 && !dst->odm_combine) { in dml20v2_rq_dlg_get_dlg_params()
1215 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml20v2_rq_dlg_get_dlg_params()
1217 full_recout_width = dst->full_recout_width; in dml20v2_rq_dlg_get_dlg_params()
1219 full_recout_width = dst->recout_width; in dml20v2_rq_dlg_get_dlg_params()
1226 full_recout_width, in dml20v2_rq_dlg_get_dlg_params()
1237 full_recout_width, in dml20v2_rq_dlg_get_dlg_params()
1246 full_recout_width); in dml20v2_rq_dlg_get_dlg_params()
1262 full_recout_width, in dml20v2_rq_dlg_get_dlg_params()
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Ddcn20_fpu.c1411 …pipes[pipe_cnt].pipe.dest.full_recout_width = pipes[pipe_cnt].pipe.dest.recout_width; /*when is_h… in dcn20_populate_dml_pipes_from_context()
1491 pipes[pipe_cnt].pipe.dest.full_recout_width = scl->recout.width; in dcn20_populate_dml_pipes_from_context()
1493 pipes[pipe_cnt].pipe.dest.full_recout_width *= 2; in dcn20_populate_dml_pipes_from_context()
1495 pipes[pipe_cnt].pipe.dest.full_recout_width *= 4; in dcn20_populate_dml_pipes_from_context()
1500 pipes[pipe_cnt].pipe.dest.full_recout_width += split_pipe->plane_res.scl_data.recout.width; in dcn20_populate_dml_pipes_from_context()
1505 pipes[pipe_cnt].pipe.dest.full_recout_width += split_pipe->plane_res.scl_data.recout.width; in dcn20_populate_dml_pipes_from_context()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c690 …ull_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio_c * pipe_param->dest.full_recout_width; in get_surf_rq_param()
693 … full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio * pipe_param->dest.full_recout_width; in get_surf_rq_param()
954 unsigned int full_recout_width; in dml_rq_dlg_get_dlg_params() local
1207 full_recout_width = 0; in dml_rq_dlg_get_dlg_params()
1212 if (dst->full_recout_width == 0 && !dst->odm_combine) { in dml_rq_dlg_get_dlg_params()
1214 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params()
1216 full_recout_width = dst->full_recout_width; in dml_rq_dlg_get_dlg_params()
1218 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
1226 full_recout_width, in dml_rq_dlg_get_dlg_params()
1238 full_recout_width, in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c778 …ull_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio_c * pipe_param->dest.full_recout_width; in get_surf_rq_param()
781 … full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio * pipe_param->dest.full_recout_width; in get_surf_rq_param()
1043 unsigned int full_recout_width; in dml_rq_dlg_get_dlg_params() local
1322 full_recout_width = 0; in dml_rq_dlg_get_dlg_params()
1327 if (dst->full_recout_width == 0 && !dst->odm_combine) { in dml_rq_dlg_get_dlg_params()
1329 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params()
1331 full_recout_width = dst->full_recout_width; in dml_rq_dlg_get_dlg_params()
1333 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
1341 full_recout_width, in dml_rq_dlg_get_dlg_params()
1353 full_recout_width, in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddml1_display_rq_dlg_calc.c1124 unsigned int full_recout_width; in dml1_rq_dlg_get_dlg_params() local
1648 full_recout_width = 0; in dml1_rq_dlg_get_dlg_params()
1650 if (e2e_pipe_param->pipe.dest.full_recout_width == 0) { in dml1_rq_dlg_get_dlg_params()
1652 full_recout_width = e2e_pipe_param->pipe.dest.recout_width * 2; /* assume half split for dcn1 */ in dml1_rq_dlg_get_dlg_params()
1654 full_recout_width = e2e_pipe_param->pipe.dest.full_recout_width; in dml1_rq_dlg_get_dlg_params()
1656 full_recout_width = e2e_pipe_param->pipe.dest.recout_width; in dml1_rq_dlg_get_dlg_params()
1662 full_recout_width, in dml1_rq_dlg_get_dlg_params()
1672 full_recout_width, in dml1_rq_dlg_get_dlg_params()
1678 DTRACE("DLG: %s: full_recout_width = %d", __func__, full_recout_width); in dml1_rq_dlg_get_dlg_params()
1703 full_recout_width, in dml1_rq_dlg_get_dlg_params()
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Ddisplay_mode_lib.c224 dml_print("DML PARAMS: full_recout_width = %d\n", pipe_dest->full_recout_width); in dml_log_pipe_params()
Ddisplay_mode_structs.h508 unsigned int full_recout_width; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/calcs/
Ddcn_calcs.c428 input->dest.full_recout_width = pipe->plane_res.scl_data.recout.width; in pipe_ctx_to_e2e_pipe_params()