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Searched refs:ew32 (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/net/ethernet/smsc/
Depic100.c186 #define ew32(reg, val) iowrite32(val, ioaddr + (reg)) macro
406 ew32(GENCTL, 0x4200); in epic_init_one()
410 ew32(TEST1, 0x0008); in epic_init_one()
413 ew32(MIICfg, 0x12); in epic_init_one()
415 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800); in epic_init_one()
416 ew32(GENCTL, 0x0200); in epic_init_one()
471 ew32(NVCTL, er32(NVCTL) & ~0x483c); in epic_init_one()
472 ew32(GENCTL, 0x0008); in epic_init_one()
543 ew32(INTMASK, 0x00000000); in epic_disable_int()
558 ew32(INTMASK, ep->irq_mask & ~EpicNapiEvent); in epic_napi_irq_off()
[all …]
/linux-6.1.9/drivers/net/ethernet/intel/e1000e/
D82571.c154 ew32(EECD, eecd); in e1000_init_nvm_params_82571()
283 ew32(SWSM2, swsm2 | E1000_SWSM2_LOCK); in e1000_init_mac_params_82571()
304 ew32(SWSM, swsm & ~E1000_SWSM_SMBI); in e1000_init_mac_params_82571()
468 ew32(SWSM, swsm | E1000_SWSM_SWESMBI); in e1000_get_hw_semaphore_82571()
499 ew32(SWSM, swsm); in e1000_put_hw_semaphore_82571()
517 ew32(EXTCNF_CTRL, extcnf_ctrl); in e1000_get_hw_semaphore_82573()
550 ew32(EXTCNF_CTRL, extcnf_ctrl); in e1000_put_hw_semaphore_82573()
607 ew32(POEMB, data); in e1000_set_d0_lplu_state_82574()
634 ew32(POEMB, data); in e1000_set_d3_lplu_state_82574()
755 ew32(HICR, E1000_HICR_FW_RESET_ENABLE); in e1000_update_nvm_checksum_82571()
[all …]
Dmac.c230 ew32(RAL(index), rar_low); in e1000e_rar_set_generic()
232 ew32(RAH(index), rar_high); in e1000e_rar_set_generic()
488 ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000e_check_for_fiber_link()
493 ew32(CTRL, ctrl); in e1000e_check_for_fiber_link()
508 ew32(TXCW, mac->txcw); in e1000e_check_for_fiber_link()
509 ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000e_check_for_fiber_link()
551 ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000e_check_for_serdes_link()
556 ew32(CTRL, ctrl); in e1000e_check_for_serdes_link()
571 ew32(TXCW, mac->txcw); in e1000e_check_for_serdes_link()
572 ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000e_check_for_serdes_link()
[all …]
Dnvm.c16 ew32(EECD, *eecd); in e1000_raise_eec_clk()
31 ew32(EECD, *eecd); in e1000_lower_eec_clk()
62 ew32(EECD, eecd); in e1000_shift_out_eec_bits()
74 ew32(EECD, eecd); in e1000_shift_out_eec_bits()
155 ew32(EECD, eecd | E1000_EECD_REQ); in e1000e_acquire_nvm()
168 ew32(EECD, eecd); in e1000e_acquire_nvm()
190 ew32(EECD, eecd); in e1000_standby_nvm()
194 ew32(EECD, eecd); in e1000_standby_nvm()
232 ew32(EECD, eecd); in e1000e_release_nvm()
252 ew32(EECD, eecd); in e1000_ready_nvm_eeprom()
[all …]
Dnetdev.c615 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
632 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1106 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1112 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1784 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1864 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1908 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1918 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1935 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1938 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
[all …]
D80003es2lan.c303 ew32(SW_FW_SYNC, swfw_sync); in e1000_acquire_swfw_sync_80003es2lan()
327 ew32(SW_FW_SYNC, swfw_sync); in e1000_release_swfw_sync_80003es2lan()
677 ew32(IMC, 0xffffffff); in e1000_reset_hw_80003es2lan()
679 ew32(RCTL, 0); in e1000_reset_hw_80003es2lan()
680 ew32(TCTL, E1000_TCTL_PSP); in e1000_reset_hw_80003es2lan()
692 ew32(CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_80003es2lan()
716 ew32(IMC, 0xffffffff); in e1000_reset_hw_80003es2lan()
780 ew32(TXDCTL(0), reg_data); in e1000_init_hw_80003es2lan()
786 ew32(TXDCTL(1), reg_data); in e1000_init_hw_80003es2lan()
791 ew32(TCTL, reg_data); in e1000_init_hw_80003es2lan()
[all …]
Dich8lan.c233 ew32(CTRL_EXT, mac_reg); in e1000_phy_is_accessible_pchlan()
255 ew32(FEXTNVM3, mac_reg); in e1000_toggle_lanphypc_pch_lpt()
261 ew32(CTRL, mac_reg); in e1000_toggle_lanphypc_pch_lpt()
265 ew32(CTRL, mac_reg); in e1000_toggle_lanphypc_pch_lpt()
333 ew32(CTRL_EXT, mac_reg); in e1000_init_phy_workarounds_pchlan()
369 ew32(CTRL_EXT, mac_reg); in e1000_init_phy_workarounds_pchlan()
942 ew32(FEXTNVM6, fextnvm6 | E1000_FEXTNVM6_REQ_PLL_CLK); in e1000_k1_workaround_lpt_lp()
986 ew32(FEXTNVM6, fextnvm6); in e1000_k1_workaround_lpt_lp()
1083 ew32(LTRV, reg); in e1000_platform_pm_pch_lpt()
1117 ew32(H2ME, mac_reg); in e1000_enable_ulp_lpt_lp()
[all …]
Dethtool.c858 ew32(STATUS, toggle); in e1000_reg_test()
867 ew32(STATUS, before); in e1000_reg_test()
1027 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
1058 ew32(IMC, mask); in e1000_intr_test()
1059 ew32(ICS, mask); in e1000_intr_test()
1076 ew32(IMS, mask); in e1000_intr_test()
1077 ew32(ICS, mask); in e1000_intr_test()
1094 ew32(IMC, ~mask & 0x00007FFF); in e1000_intr_test()
1095 ew32(ICS, ~mask & 0x00007FFF); in e1000_intr_test()
1107 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
[all …]
Dptp.c60 ew32(TIMINCA, timinca); in e1000e_phc_adjfine()
116 ew32(TSYNCTXCTL, tsync_ctrl); in e1000e_phc_get_syncdevicetime()
Dphy.c136 ew32(MDIC, mdic); in e1000e_read_phy_reg_mdic()
200 ew32(MDIC, mdic); in e1000e_write_phy_reg_mdic()
467 ew32(KMRNCTRLSTA, kmrnctrlsta); in __e1000_read_kmrn_reg()
540 ew32(KMRNCTRLSTA, kmrnctrlsta); in __e1000_write_kmrn_reg()
1462 ew32(CTRL, ctrl); in e1000e_phy_force_speed_duplex_setup()
2107 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST); in e1000e_phy_hw_reset_generic()
2112 ew32(CTRL, ctrl); in e1000e_phy_hw_reset_generic()
Dmanage.c279 ew32(HICR, hicr | E1000_HICR_C); in e1000e_mng_write_dhcp_info()
De1000.h586 #define ew32(reg, val) __ew32(hw, E1000_##reg, (val)) macro
/linux-6.1.9/drivers/net/ethernet/intel/e1000/
De1000_hw.c391 ew32(IMC, 0xffffffff); in e1000_reset_hw()
397 ew32(RCTL, 0); in e1000_reset_hw()
398 ew32(TCTL, E1000_TCTL_PSP); in e1000_reset_hw()
413 ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST)); in e1000_reset_hw()
440 ew32(CTRL_DUP, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
444 ew32(CTRL, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
461 ew32(CTRL_EXT, ctrl_ext); in e1000_reset_hw()
485 ew32(MANC, manc); in e1000_reset_hw()
495 ew32(LEDCTL, led_ctrl); in e1000_reset_hw()
500 ew32(IMC, 0xffffffff); in e1000_reset_hw()
[all …]
De1000_ethtool.c732 ew32(STATUS, toggle); in e1000_reg_test()
741 ew32(STATUS, before); in e1000_reg_test()
851 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
868 ew32(IMC, mask); in e1000_intr_test()
869 ew32(ICS, mask); in e1000_intr_test()
886 ew32(IMS, mask); in e1000_intr_test()
887 ew32(ICS, mask); in e1000_intr_test()
904 ew32(IMC, ~mask & 0x00007FFF); in e1000_intr_test()
905 ew32(ICS, ~mask & 0x00007FFF); in e1000_intr_test()
917 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
[all …]
De1000_main.c284 ew32(IMC, ~0); in e1000_irq_disable()
297 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
339 ew32(MANC, manc); in e1000_init_manageability()
353 ew32(MANC, manc); in e1000_release_manageability()
401 ew32(ICS, E1000_ICS_LSC); in e1000_up()
497 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_down()
505 ew32(TCTL, tctl); in e1000_down()
603 ew32(PBA, pba); in e1000_reset()
655 ew32(PBA, pba); in e1000_reset()
678 ew32(WUC, 0); in e1000_reset()
[all …]
De1000_osdep.h32 #define ew32(reg, value) \ macro
/linux-6.1.9/drivers/net/ethernet/intel/igbvf/
Dnetdev.c865 ew32(EIMS, adapter->eims_other); in igbvf_msix_other()
891 ew32(EICS, tx_ring->eims_value); in igbvf_intr_msix_tx()
893 ew32(EIMS, tx_ring->eims_value); in igbvf_intr_msix_tx()
996 ew32(IVAR_MISC, tmp); in igbvf_configure_msix()
1160 ew32(EIMC, ~0); in igbvf_irq_disable()
1163 ew32(EIAC, 0); in igbvf_irq_disable()
1174 ew32(EIAC, adapter->eims_enable_mask); in igbvf_irq_enable()
1175 ew32(EIAM, adapter->eims_enable_mask); in igbvf_irq_enable()
1176 ew32(EIMS, adapter->eims_enable_mask); in igbvf_irq_enable()
1204 ew32(EIMS, adapter->rx_ring->eims_value); in igbvf_poll()
[all …]
Dmbx.c218 ew32(V2PMAILBOX(0), E1000_V2PMAILBOX_VFU); in e1000_obtain_mbx_lock_vf()
263 ew32(V2PMAILBOX(0), E1000_V2PMAILBOX_REQ); in e1000_write_mbx_vf()
294 ew32(V2PMAILBOX(0), E1000_V2PMAILBOX_ACK); in e1000_read_mbx_vf()
Dregs.h77 #define ew32(reg, val) writel((val), hw->hw_addr + E1000_##reg) macro
Dvf.c113 ew32(CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_vf()