/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | dcn31_fpu.c | 130 .dtbclk_mhz = 625.0, 139 .dtbclk_mhz = 625.0, 148 .dtbclk_mhz = 625.0, 157 .dtbclk_mhz = 625.0, 166 .dtbclk_mhz = 625.0, 373 .dtbclk_mhz = 625.0, 382 .dtbclk_mhz = 625.0, 391 .dtbclk_mhz = 625.0, 400 .dtbclk_mhz = 625.0, 409 .dtbclk_mhz = 625.0, [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
D | dcn321_fpu.c | 119 .dtbclk_mhz = 1564.0, 286 if (bw_params->clk_table.entries[i].dtbclk_mhz > max_dtbclk_mhz) in build_synthetic_soc_states() 287 max_dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in build_synthetic_soc_states() 313 entry.dtbclk_mhz = max_dtbclk_mhz; in build_synthetic_soc_states() 666 if (!bw_params->clk_table.entries[i].dtbclk_mhz) { in dcn321_update_bw_bounding_box_fpu() 667 dcn3_21_soc.clock_limits[i].dtbclk_mhz = dcn3_21_soc.clock_limits[i-1].dtbclk_mhz; in dcn321_update_bw_bounding_box_fpu() 669 dcn3_21_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn321_update_bw_bounding_box_fpu() 671 } else if (bw_params->clk_table.entries[i].dtbclk_mhz) { in dcn321_update_bw_bounding_box_fpu() 672 dcn3_21_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn321_update_bw_bounding_box_fpu()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | dcn314_fpu.c | 109 .dtbclk_mhz = 600.0, 118 .dtbclk_mhz = 600.0, 127 .dtbclk_mhz = 600.0, 136 .dtbclk_mhz = 600.0, 145 .dtbclk_mhz = 600.0, 251 clock_limits[i].dtbclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn314_update_bw_bounding_box_fpu()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_clk_mgr.c | 245 .dtbclk_mhz = 600, 253 .dtbclk_mhz = 600, 261 .dtbclk_mhz = 600, 269 .dtbclk_mhz = 600, 277 .dtbclk_mhz = 600, 511 bw_params->clk_table.entries[i].dtbclk_mhz = bw_params->clk_table.entries[j].dtbclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params() 542 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params() 565 if (!bw_params->clk_table.entries[i].dtbclk_mhz) in dcn315_clk_mgr_helper_populate_bw_params() 566 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
D | dcn302_fpu.c | 319 if (!bw_params->clk_table.entries[i].dtbclk_mhz && i > 0) in dcn302_fpu_update_bw_bounding_box() 320 dcn3_02_soc.clock_limits[i].dtbclk_mhz = dcn3_02_soc.clock_limits[i-1].dtbclk_mhz; in dcn302_fpu_update_bw_bounding_box() 322 dcn3_02_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn302_fpu_update_bw_bounding_box()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
D | dcn303_fpu.c | 314 if (!bw_params->clk_table.entries[i].dtbclk_mhz && i > 0) in dcn303_fpu_update_bw_bounding_box() 315 dcn3_03_soc.clock_limits[i].dtbclk_mhz = dcn3_03_soc.clock_limits[i-1].dtbclk_mhz; in dcn303_fpu_update_bw_bounding_box() 317 dcn3_03_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn303_fpu_update_bw_bounding_box()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_clk_mgr.c | 621 bw_params->clk_table.entries[i].dtbclk_mhz = bw_params->clk_table.entries[j].dtbclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params() 660 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params() 684 if (!bw_params->clk_table.entries[i].dtbclk_mhz) in dcn314_clk_mgr_helper_populate_bw_params() 685 bw_params->clk_table.entries[i].dtbclk_mhz = def_max.dtbclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
D | dcn32_fpu.c | 120 .dtbclk_mhz = 1564.0, 2080 if (bw_params->clk_table.entries[i].dtbclk_mhz > max_dtbclk_mhz) in dcn32_patch_dpm_table() 2081 max_dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn32_patch_dpm_table() 2095 bw_params->clk_table.entries[0].dtbclk_mhz = dcn3_2_soc.clock_limits[0].dtbclk_mhz; in dcn32_patch_dpm_table() 2131 if (bw_params->clk_table.entries[i].dtbclk_mhz > max_dtbclk_mhz) in build_synthetic_soc_states() 2132 max_dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in build_synthetic_soc_states() 2158 entry.dtbclk_mhz = max_dtbclk_mhz; in build_synthetic_soc_states() 2514 if (!bw_params->clk_table.entries[i].dtbclk_mhz) { in dcn32_update_bw_bounding_box_fpu() 2515 dcn3_2_soc.clock_limits[i].dtbclk_mhz = dcn3_2_soc.clock_limits[i-1].dtbclk_mhz; in dcn32_update_bw_bounding_box_fpu() 2517 dcn3_2_soc.clock_limits[i].dtbclk_mhz = bw_params->clk_table.entries[i].dtbclk_mhz; in dcn32_update_bw_bounding_box_fpu() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
D | dcn301_fpu.c | 362 s[i].dtbclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn301_update_bw_bounding_box()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | clk_mgr.h | 90 unsigned int dtbclk_mhz; member
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/ |
D | display_mode_structs.h | 169 double dtbclk_mhz; member
|
D | display_mode_vba.c | 405 mode_lib->vba.DTBCLKPerState[i] = soc->clock_limits[i].dtbclk_mhz; in fetch_socbb_params()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_clk_mgr.c | 194 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn32_init_clocks() 441 new_clocks->ref_dtbclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; in dcn32_update_clocks()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | dcn30_fpu.c | 605 dcn3_0_soc.clock_limits[i].dtbclk_mhz = dcn3_0_soc.clock_limits[0].dtbclk_mhz; in dcn30_fpu_update_bw_bounding_box()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 139 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn3_init_clocks()
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | dcn20_fpu.c | 2224 low_pstate_lvl.dtbclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dtbclk_mhz; in construct_low_pstate_lvl() 2278 s[k].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn21_update_bw_bounding_box()
|