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Searched refs:div_core_mask (Results 1 – 15 of 15) sorted by relevance

/linux-6.1.9/drivers/clk/rockchip/
Dclk-cpu.c90 clksel0 &= reg_data->div_core_mask[0]; in rockchip_cpuclk_recalc_rate()
146 if (alt_div > reg_data->div_core_mask[0]) { in rockchip_cpuclk_pre_rate_change()
148 __func__, alt_div, reg_data->div_core_mask[0]); in rockchip_cpuclk_pre_rate_change()
149 alt_div = reg_data->div_core_mask[0]; in rockchip_cpuclk_pre_rate_change()
163 writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask[i], in rockchip_cpuclk_pre_rate_change()
212 writel(HIWORD_UPDATE(0, reg_data->div_core_mask[i], in rockchip_cpuclk_post_rate_change()
Dclk-rk3188.c150 .div_core_mask[0] = 0x1f,
190 .div_core_mask[0] = 0x1f,
Dclk-rk3568.c194 .div_core_mask[0] = 0x1f,
197 .div_core_mask[1] = 0x1f,
200 .div_core_mask[2] = 0x1f,
203 .div_core_mask[3] = 0x1f,
Dclk-rk3368.c159 .div_core_mask[0] = 0x1f,
173 .div_core_mask[0] = 0x1f,
Dclk-rk3036.c107 .div_core_mask[0] = 0x1f,
Dclk-rk3128.c122 .div_core_mask[0] = 0x1f,
Dclk-rk3228.c124 .div_core_mask[0] = 0x1f,
Dclk-rk3399.c296 .div_core_mask[0] = 0x1f,
307 .div_core_mask[0] = 0x1f,
Dclk-rk3328.c135 .div_core_mask[0] = 0x1f,
Dclk-rv1108.c111 .div_core_mask[0] = 0x1f,
Dclk.h399 u32 div_core_mask[ROCKCHIP_CPUCLK_MAX_CORES]; member
Dclk-rk3288.c184 .div_core_mask[0] = 0x1f,
Dclk-px30.c129 .div_core_mask[0] = 0xf,
Dclk-rk3308.c114 .div_core_mask[0] = 0xf,
Dclk-rv1126.c137 .div_core_mask[0] = 0x1f,