/linux-6.1.9/drivers/clk/samsung/ |
D | clk-exynos5260.c | 134 .div_clks = aud_div_clks, 324 .div_clks = disp_div_clks, 390 .div_clks = egl_div_clks, 579 .div_clks = g2d_div_clks, 642 .div_clks = g3d_div_clks, 775 .div_clks = gscl_div_clks, 894 .div_clks = isp_div_clks, 960 .div_clks = kfc_div_clks, 1014 .div_clks = mfc_div_clks, 1163 .div_clks = mif_div_clks, [all …]
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D | clk-exynos5-subcmu.h | 14 const struct samsung_div_clock *div_clks; member
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D | clk-exynos850.c | 464 .div_clks = top_div_clks, 602 .div_clks = apm_div_clks, 880 .div_clks = aud_div_clks, 983 .div_clks = cmgp_div_clks, 1205 .div_clks = is_div_clks, 1314 .div_clks = mfcmscl_div_clks, 1489 .div_clks = peri_div_clks, 1596 .div_clks = core_div_clks, 1670 .div_clks = dpu_div_clks,
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D | clk-exynos3250.c | 326 static const struct samsung_div_clock div_clks[] __initconst = { variable 802 .div_clks = div_clks, 803 .nr_div_clks = ARRAY_SIZE(div_clks), 924 .div_clks = dmc_div_clks, 1066 .div_clks = isp_div_clks,
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D | clk-exynos7.c | 191 .div_clks = topc_div_clks, 383 .div_clks = top0_div_clks, 565 .div_clks = top1_div_clks, 1099 .div_clks = fsys1_div_clks, 1212 .div_clks = mscl_div_clks, 1301 .div_clks = aud_div_clks,
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D | clk-fsd.c | 301 .div_clks = cmu_div_clks, 664 .div_clks = peric_div_clks, 963 .div_clks = fsys0_div_clks, 1135 .div_clks = fsys1_div_clks, 1414 .div_clks = imem_div_clks, 1539 .div_clks = mfc_div_clks, 1743 .div_clks = cam_csi_div_clks,
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D | clk-exynosautov9.c | 940 .div_clks = top_div_clks, 1002 .div_clks = busmc_div_clks, 1060 .div_clks = core_div_clks, 1427 .div_clks = fsys1_div_clks, 1749 .div_clks = peric0_div_clks, 2004 .div_clks = peric1_div_clks,
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D | clk.c | 352 if (cmu->div_clks) in samsung_cmu_register_one() 353 samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks); in samsung_cmu_register_one()
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D | clk-exynos5433.c | 793 .div_clks = top_div_clks, 876 .div_clks = cpif_div_clks, 1528 .div_clks = mif_div_clks, 1729 .div_clks = peric_div_clks, 2458 .div_clks = g2d_div_clks, 2882 .div_clks = disp_div_clks, 3054 .div_clks = aud_div_clks, 3188 .div_clks = bus##id##_div_clks, \ 3339 .div_clks = g3d_div_clks, 3690 .div_clks = apollo_div_clks, [all …]
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D | clk-s5pv210.c | 477 static const struct samsung_div_clock div_clks[] __initconst = { variable 777 samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks)); in __s5pv210_clk_init()
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D | clk-exynos5-subcmu.c | 109 samsung_clk_register_div(ctx, info->div_clks, info->nr_div_clks); in exynos5_subcmu_probe()
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D | clk-exynos7885.c | 333 .div_clks = top_div_clks, 661 .div_clks = core_div_clks,
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D | clk-exynos5420.c | 1327 .div_clks = exynos5x_disp_div_clks, 1337 .div_clks = exynos5x_gsc_div_clks, 1355 .div_clks = exynos5x_mfc_div_clks, 1365 .div_clks = exynos5x_mscl_div_clks,
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D | clk-exynos5410.c | 259 .div_clks = exynos5410_div_clks,
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D | clk.h | 312 const struct samsung_div_clock *div_clks; member
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/linux-6.1.9/drivers/clk/tegra/ |
D | clk-tegra-periph.c | 823 static struct tegra_periph_init_data div_clks[] = { variable 919 for (i = 0; i < ARRAY_SIZE(div_clks); i++) { in div_clk_init() 922 data = div_clks + i; in div_clk_init()
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