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Searched refs:cw4 (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_dcn30.c125 const struct dmub_window *cw4, in dmub_dcn30_setup_windows() argument
158 offset = cw4->offset; in dmub_dcn30_setup_windows()
164 REG_WRITE(DMCUB_REGION3_CW4_BASE_ADDRESS, cw4->region.base); in dmub_dcn30_setup_windows()
166 DMCUB_REGION3_CW4_TOP_ADDRESS, cw4->region.top, in dmub_dcn30_setup_windows()
173 cw4->region.top - cw4->region.base - 1, in dmub_dcn30_setup_windows()
Ddmub_dcn20.c192 const struct dmub_window *cw4, in dmub_dcn20_setup_windows() argument
228 dmub_dcn20_translate_addr(&cw4->offset, fb_base, fb_offset, &offset); in dmub_dcn20_setup_windows()
234 REG_WRITE(DMCUB_REGION3_CW4_BASE_ADDRESS, cw4->region.base); in dmub_dcn20_setup_windows()
236 DMCUB_REGION3_CW4_TOP_ADDRESS, cw4->region.top, in dmub_dcn20_setup_windows()
243 cw4->region.top - cw4->region.base - 1, in dmub_dcn20_setup_windows()
Ddmub_srv.c516 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; in dmub_srv_hw_init() local
568 cw4.offset.quad_part = mail_fb->gpu_addr; in dmub_srv_hw_init()
569 cw4.region.base = DMUB_CW4_BASE; in dmub_srv_hw_init()
570 cw4.region.top = cw4.region.base + mail_fb->size; in dmub_srv_hw_init()
579 inbox1.base = cw4.region.base; in dmub_srv_hw_init()
580 inbox1.top = cw4.region.base + DMUB_RB_SIZE; in dmub_srv_hw_init()
582 outbox1.top = cw4.region.top; in dmub_srv_hw_init()
600 dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4, &cw5, &cw6); in dmub_srv_hw_init()
Ddmub_dcn30.h44 const struct dmub_window *cw4,
Ddmub_dcn31.c188 const struct dmub_window *cw4, in dmub_dcn31_setup_windows() argument
203 offset = cw4->offset; in dmub_dcn31_setup_windows()
207 REG_WRITE(DMCUB_REGION3_CW4_BASE_ADDRESS, cw4->region.base); in dmub_dcn31_setup_windows()
209 DMCUB_REGION3_CW4_TOP_ADDRESS, cw4->region.top, in dmub_dcn31_setup_windows()
Ddmub_dcn32.c211 const struct dmub_window *cw4, in dmub_dcn32_setup_windows() argument
226 offset = cw4->offset; in dmub_dcn32_setup_windows()
230 REG_WRITE(DMCUB_REGION3_CW4_BASE_ADDRESS, cw4->region.base); in dmub_dcn32_setup_windows()
232 DMCUB_REGION3_CW4_TOP_ADDRESS, cw4->region.top, in dmub_dcn32_setup_windows()
Ddmub_dcn20.h198 const struct dmub_window *cw4,
Ddmub_dcn31.h200 const struct dmub_window *cw4,
Ddmub_dcn32.h202 const struct dmub_window *cw4,
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/
Ddmub_srv.h322 const struct dmub_window *cw4,