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Searched refs:cntval_bits (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/arch/x86/events/intel/
Dp6.c225 .cntval_bits = 32,
Dknc.c307 .cntval_bits = 40,
Dp4.c1062 if (!overflow && (val & (1ULL << (x86_pmu.cntval_bits - 1)))) in p4_pmu_handle_irq()
1358 .cntval_bits = ARCH_P4_CNTRVAL_BITS,
Dds.c1904 int shift = 64 - x86_pmu.cntval_bits; in intel_pmu_save_and_restart_reload()
Dcore.c5775 x86_pmu.cntval_bits = eax.split.bit_width; in intel_pmu_init()
/linux-6.1.9/arch/x86/events/
Dcore.c116 int shift = 64 - x86_pmu.cntval_bits; in x86_perf_event_update()
1691 if (val & (1ULL << (x86_pmu.cntval_bits - 1))) in x86_pmu_handle_irq()
2045 pr_info("... bit width: %d\n", x86_pmu.cntval_bits); in x86_pmu_show_pmu_cap()
2741 userpg->pmc_width = x86_pmu.cntval_bits; in arch_perf_update_userpage()
3010 cap->bit_width_gp = x86_pmu.cntval_bits; in perf_get_x86_pmu_capability()
3011 cap->bit_width_fixed = x86_pmu.cntval_bits; in perf_get_x86_pmu_capability()
Dperf_event.h762 int cntval_bits; member
/linux-6.1.9/arch/x86/events/amd/
Dcore.c652 return !(counter & BIT_ULL(x86_pmu.cntval_bits - 1)); in amd_pmu_test_overflow_topbit()
1253 .cntval_bits = 48,
/linux-6.1.9/arch/x86/events/zhaoxin/
Dcore.c534 x86_pmu.cntval_bits = eax.split.bit_width; in zhaoxin_pmu_init()