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Searched refs:clock_ranges (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0_5_ppt.c400 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_5_set_watermarks_table() argument
406 if (!table || !clock_ranges) in smu_v13_0_5_set_watermarks_table()
409 if (clock_ranges) { in smu_v13_0_5_set_watermarks_table()
410 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v13_0_5_set_watermarks_table()
411 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_5_set_watermarks_table()
414 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v13_0_5_set_watermarks_table()
416 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()
418 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()
420 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
422 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
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Dsmu_v13_0_4_ppt.c632 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_4_set_watermarks_table() argument
638 if (!table || !clock_ranges) in smu_v13_0_4_set_watermarks_table()
641 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v13_0_4_set_watermarks_table()
642 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_4_set_watermarks_table()
645 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v13_0_4_set_watermarks_table()
647 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
649 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
651 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
653 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
656 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
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Dyellow_carp_ppt.c483 struct pp_smu_wm_range_sets *clock_ranges) in yellow_carp_set_watermarks_table() argument
489 if (!table || !clock_ranges) in yellow_carp_set_watermarks_table()
492 if (clock_ranges) { in yellow_carp_set_watermarks_table()
493 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in yellow_carp_set_watermarks_table()
494 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in yellow_carp_set_watermarks_table()
497 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in yellow_carp_set_watermarks_table()
499 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()
501 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in yellow_carp_set_watermarks_table()
503 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
505 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c1043 struct pp_smu_wm_range_sets *clock_ranges) in renoir_set_watermarks_table() argument
1049 if (clock_ranges) { in renoir_set_watermarks_table()
1050 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in renoir_set_watermarks_table()
1051 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in renoir_set_watermarks_table()
1055 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in renoir_set_watermarks_table()
1057 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()
1059 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()
1061 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1063 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1066 clock_ranges->reader_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c1594 struct pp_smu_wm_range_sets *clock_ranges) in vangogh_set_watermarks_table() argument
1600 if (!table || !clock_ranges) in vangogh_set_watermarks_table()
1603 if (clock_ranges) { in vangogh_set_watermarks_table()
1604 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in vangogh_set_watermarks_table()
1605 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()
1608 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in vangogh_set_watermarks_table()
1610 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()
1612 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in vangogh_set_watermarks_table()
1614 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1616 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
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Dnavi10_ppt.c2114 struct pp_smu_wm_range_sets *clock_ranges) in navi10_set_watermarks_table() argument
2120 if (clock_ranges) { in navi10_set_watermarks_table()
2121 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in navi10_set_watermarks_table()
2122 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in navi10_set_watermarks_table()
2125 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in navi10_set_watermarks_table()
2127 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
2129 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
2131 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2133 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2136 clock_ranges->reader_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
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Dsienna_cichlid_ppt.c1811 struct pp_smu_wm_range_sets *clock_ranges) in sienna_cichlid_set_watermarks_table() argument
1817 if (clock_ranges) { in sienna_cichlid_set_watermarks_table()
1818 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in sienna_cichlid_set_watermarks_table()
1819 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in sienna_cichlid_set_watermarks_table()
1822 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in sienna_cichlid_set_watermarks_table()
1824 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1826 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1828 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1830 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1833 clock_ranges->reader_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/
Dsmu_internal.h76 #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, c… argument
Damdgpu_smu.c2069 struct pp_smu_wm_range_sets *clock_ranges) in smu_set_watermarks_for_clock_ranges() argument
2079 return smu_set_watermarks_table(smu, clock_ranges); in smu_set_watermarks_for_clock_ranges()
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dhardwaremanager.c465 void *clock_ranges) in phm_set_watermarks_for_clocks_ranges() argument
473 clock_ranges); in phm_set_watermarks_for_clocks_ranges()
Dsmu10_hwmgr.c1343 void *clock_ranges) in smu10_set_watermarks_for_clocks_ranges() argument
1346 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges()
Dvega12_hwmgr.c1977 void *clock_ranges) in vega12_set_watermarks_for_clocks_ranges() argument
1981 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges()
Dvega20_hwmgr.c2937 void *clock_ranges) in vega20_set_watermarks_for_clocks_ranges() argument
2941 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges()
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/inc/
Dhardwaremanager.h457 void *clock_ranges);
Dhwmgr.h310 int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/
Damd_powerplay.c1089 void *clock_ranges) in pp_set_watermarks_for_clocks_ranges() argument
1093 if (!hwmgr || !hwmgr->pm_en || !clock_ranges) in pp_set_watermarks_for_clocks_ranges()
1097 clock_ranges); in pp_set_watermarks_for_clocks_ranges()
/linux-6.1.9/drivers/gpu/drm/amd/pm/inc/
Damdgpu_dpm.h535 void *clock_ranges);
/linux-6.1.9/drivers/gpu/drm/amd/include/
Dkgd_pp_interface.h381 void *clock_ranges);
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/inc/
Damdgpu_smu.h774 struct pp_smu_wm_range_sets *clock_ranges);
/linux-6.1.9/drivers/gpu/drm/amd/pm/
Damdgpu_dpm.c1557 void *clock_ranges) in amdgpu_dpm_set_watermarks_for_clocks_ranges() argument
1567 clock_ranges); in amdgpu_dpm_set_watermarks_for_clocks_ranges()