Searched refs:acrtc (Results 1 – 8 of 8) sorted by relevance
37 void dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc) in dm_crtc_handle_vblank() argument39 struct drm_crtc *crtc = &acrtc->base; in dm_crtc_handle_vblank()48 if (acrtc->event && acrtc->pflip_status != AMDGPU_FLIP_SUBMITTED) { in dm_crtc_handle_vblank()49 drm_crtc_send_vblank_event(crtc, acrtc->event); in dm_crtc_handle_vblank()51 acrtc->event = NULL; in dm_crtc_handle_vblank()64 bool amdgpu_dm_vrr_active_irq(struct amdgpu_crtc *acrtc) in amdgpu_dm_vrr_active_irq() argument67 return acrtc->dm_irq_params.freesync_config.state == in amdgpu_dm_vrr_active_irq()69 acrtc->dm_irq_params.freesync_config.state == in amdgpu_dm_vrr_active_irq()76 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in dm_set_vupdate_irq() local80 irq_source = IRQ_TYPE_VUPDATE + acrtc->otg_inst; in dm_set_vupdate_irq()[all …]
89 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in amdgpu_dm_set_crc_window_default() local92 acrtc->dm_irq_params.crc_window.x_start = 0; in amdgpu_dm_set_crc_window_default()93 acrtc->dm_irq_params.crc_window.y_start = 0; in amdgpu_dm_set_crc_window_default()94 acrtc->dm_irq_params.crc_window.x_end = 0; in amdgpu_dm_set_crc_window_default()95 acrtc->dm_irq_params.crc_window.y_end = 0; in amdgpu_dm_set_crc_window_default()96 acrtc->dm_irq_params.crc_window.activated = false; in amdgpu_dm_set_crc_window_default()97 acrtc->dm_irq_params.crc_window.update_win = false; in amdgpu_dm_set_crc_window_default()98 acrtc->dm_irq_params.crc_window.skip_frame_cnt = 0; in amdgpu_dm_set_crc_window_default()141 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in amdgpu_dm_crc_window_is_activated() local145 ret = acrtc->dm_irq_params.crc_window.activated; in amdgpu_dm_crc_window_is_activated()[all …]
30 void dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc);38 bool amdgpu_dm_vrr_active_irq(struct amdgpu_crtc *acrtc);
259 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; in dm_vblank_get_counter() local261 if (acrtc->dm_irq_params.stream == NULL) { in dm_vblank_get_counter()267 return dc_stream_get_vblank_counter(acrtc->dm_irq_params.stream); in dm_vblank_get_counter()279 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; in dm_crtc_get_scanoutpos() local281 if (acrtc->dm_irq_params.stream == NULL) { in dm_crtc_get_scanoutpos()291 dc_stream_get_scanoutpos(acrtc->dm_irq_params.stream, in dm_crtc_get_scanoutpos()467 struct amdgpu_crtc *acrtc; in dm_vupdate_high_irq() local474 acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VUPDATE); in dm_vupdate_high_irq()476 if (acrtc) { in dm_vupdate_high_irq()477 vrr_active = amdgpu_dm_vrr_active_irq(acrtc); in dm_vupdate_high_irq()[all …]
3079 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in crc_win_x_start_set() local3082 acrtc->dm_irq_params.crc_window.x_start = (uint16_t) val; in crc_win_x_start_set()3083 acrtc->dm_irq_params.crc_window.update_win = false; in crc_win_x_start_set()3096 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in crc_win_x_start_get() local3099 *val = acrtc->dm_irq_params.crc_window.x_start; in crc_win_x_start_get()3116 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in crc_win_y_start_set() local3119 acrtc->dm_irq_params.crc_window.y_start = (uint16_t) val; in crc_win_y_start_set()3120 acrtc->dm_irq_params.crc_window.update_win = false; in crc_win_y_start_set()3133 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); in crc_win_y_start_get() local3136 *val = acrtc->dm_irq_params.crc_window.y_start; in crc_win_y_start_get()[all …]
709 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc_id]; in dm_irq_state() local711 if (!acrtc) { in dm_irq_state()719 if (acrtc->otg_inst == -1) in dm_irq_state()722 irq_source = dal_irq_type + acrtc->otg_inst; in dm_irq_state()
118 struct amdgpu_crtc *acrtc; member
379 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(connector_state->crtc); in dm_mst_atomic_best_encoder() local381 return &adev->dm.mst_encoders[acrtc->crtc_id].base; in dm_mst_atomic_best_encoder()