Searched refs:VLV_DISPLAY_BASE (Results 1 – 7 of 7) sorted by relevance
46 #define _VLV_HDMIW_HDMIEDID_A (VLV_DISPLAY_BASE + 0x62050)47 #define _VLV_HDMIW_HDMIEDID_B (VLV_DISPLAY_BASE + 0x62150)49 #define _VLV_AUD_CNTL_ST_A (VLV_DISPLAY_BASE + 0x620B4)50 #define _VLV_AUD_CNTL_ST_B (VLV_DISPLAY_BASE + 0x621B4)52 #define VLV_AUD_CNTL_ST2 _MMIO(VLV_DISPLAY_BASE + 0x620C0)60 #define _VLV_AUD_CONFIG_A (VLV_DISPLAY_BASE + 0x62000)61 #define _VLV_AUD_CONFIG_B (VLV_DISPLAY_BASE + 0x62100)
11 #define VLV_MIPI_BASE VLV_DISPLAY_BASE41 #define _MIPIA_PORT_CTRL (VLV_DISPLAY_BASE + 0x61190)42 #define _MIPIC_PORT_CTRL (VLV_DISPLAY_BASE + 0x61700)90 #define _MIPIA_TEARING_CTRL (VLV_DISPLAY_BASE + 0x61194)91 #define _MIPIC_TEARING_CTRL (VLV_DISPLAY_BASE + 0x61704)97 #define _MIPIA_AUTOPWG (VLV_DISPLAY_BASE + 0x611a0)
883 i915->display.gmbus.mmio_base = VLV_DISPLAY_BASE; in intel_gmbus_setup()
226 #define VLV_IOSF_DOORBELL_REQ _MMIO(VLV_DISPLAY_BASE + 0x2100)248 #define VLV_IOSF_DATA _MMIO(VLV_DISPLAY_BASE + 0x2104)249 #define VLV_IOSF_ADDR _MMIO(VLV_DISPLAY_BASE + 0x2108)254 #define DPIO_CTL _MMIO(VLV_DISPLAY_BASE + 0x2110)1023 #define CLAIM_ER _MMIO(VLV_DISPLAY_BASE + 0x2028)1047 #define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030)1048 #define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034)1056 #define VLV_GUNIT_CLOCK_GATE _MMIO(VLV_DISPLAY_BASE + 0x2060)1059 #define VLV_GUNIT_CLOCK_GATE2 _MMIO(VLV_DISPLAY_BASE + 0x2064)1060 #define VLV_IIR_RW _MMIO(VLV_DISPLAY_BASE + 0x2084)[all …]
124 #define VLV_DISPLAY_BASE 0x180000 macro
548 .display.mmio_offset = VLV_DISPLAY_BASE,646 .display.mmio_offset = VLV_DISPLAY_BASE,
1397 #define CHV_FUSE_GT _MMIO(VLV_DISPLAY_BASE + 0x2168)