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Searched refs:UVD_RBC_RB_RPTR__RB_RPTR__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h726 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro
Duvd_3_1_sh_mask.h606 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT 0x4 macro
Duvd_4_0_sh_mask.h609 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT 0x00000004 macro
Duvd_4_2_sh_mask.h612 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT 0x4 macro
Duvd_5_0_sh_mask.h674 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT 0x4 macro
Duvd_6_0_sh_mask.h676 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT 0x4 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1250 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro
Dvcn_2_5_sh_mask.h2925 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro
Dvcn_2_0_0_sh_mask.h2865 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro
Dvcn_2_6_0_sh_mask.h3250 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro
Dvcn_3_0_0_sh_mask.h4006 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro
Dvcn_4_0_0_sh_mask.h6847 #define UVD_RBC_RB_RPTR__RB_RPTR__SHIFT macro