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Searched refs:UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK (Results 1 – 19 of 19) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h527 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro
Duvd_3_1_sh_mask.h363 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK 0x200000 macro
Duvd_4_0_sh_mask.h346 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK 0x00200000L macro
Duvd_4_2_sh_mask.h367 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK 0x200000 macro
Duvd_5_0_sh_mask.h399 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK 0x200000 macro
Duvd_6_0_sh_mask.h401 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK 0x200000 macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c814 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK); in vcn_v1_0_start_spg_mode()
995 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in vcn_v1_0_start_dpg_mode()
1050 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in vcn_v1_0_start_dpg_mode()
Dvcn_v4_0.c901 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in vcn_v4_0_start_dpg_mode()
1042 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK); in vcn_v4_0_start()
Duvd_v7_0.c890 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in uvd_v7_0_sriov_start()
1005 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in uvd_v7_0_start()
Dvcn_v2_0.c829 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in vcn_v2_0_start_dpg_mode()
966 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK); in vcn_v2_0_start()
Dvcn_v2_5.c811 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in vcn_v2_5_start_dpg_mode()
967 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK); in vcn_v2_5_start()
Dvcn_v3_0.c977 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in vcn_v3_0_start_dpg_mode()
1145 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK); in vcn_v3_0_start()
Duvd_v6_0.c765 UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | in uvd_v6_0_start()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1049 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro
Dvcn_2_5_sh_mask.h3371 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro
Dvcn_2_0_0_sh_mask.h2420 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro
Dvcn_2_6_0_sh_mask.h964 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro
Dvcn_3_0_0_sh_mask.h4687 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro
Dvcn_4_0_0_sh_mask.h4840 #define UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK macro