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Searched refs:UVD_CGC_GATE__MPRD_MASK (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c649 UVD_CGC_GATE__MPRD_MASK | in uvd_v5_0_enable_clock_gating()
736 UVD_CGC_GATE__MPRD_MASK |
Duvd_v6_0.c649 UVD_CGC_GATE__MPRD_MASK |
682 UVD_CGC_GATE__MPRD_MASK |
1306 UVD_CGC_GATE__MPRD_MASK | in uvd_v6_0_enable_clock_gating()
1394 UVD_CGC_GATE__MPRD_MASK |
Dvcn_v4_0.c657 | UVD_CGC_GATE__MPRD_MASK in vcn_v4_0_disable_clock_gating()
Duvd_v7_0.c1678 UVD_CGC_GATE__MPRD_MASK |
Dvcn_v1_0.c488 | UVD_CGC_GATE__MPRD_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_0.c513 | UVD_CGC_GATE__MPRD_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v2_5.c580 | UVD_CGC_GATE__MPRD_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c718 | UVD_CGC_GATE__MPRD_MASK in vcn_v3_0_disable_clock_gating()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h405 #define UVD_CGC_GATE__MPRD_MASK macro
Duvd_3_1_sh_mask.h139 #define UVD_CGC_GATE__MPRD_MASK 0x100 macro
Duvd_4_0_sh_mask.h92 #define UVD_CGC_GATE__MPRD_MASK 0x00000100L macro
Duvd_4_2_sh_mask.h139 #define UVD_CGC_GATE__MPRD_MASK 0x100 macro
Duvd_5_0_sh_mask.h151 #define UVD_CGC_GATE__MPRD_MASK 0x100 macro
Duvd_6_0_sh_mask.h153 #define UVD_CGC_GATE__MPRD_MASK 0x100 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h833 #define UVD_CGC_GATE__MPRD_MASK macro
Dvcn_2_5_sh_mask.h1903 #define UVD_CGC_GATE__MPRD_MASK macro
Dvcn_2_0_0_sh_mask.h1852 #define UVD_CGC_GATE__MPRD_MASK macro
Dvcn_2_6_0_sh_mask.h3574 #define UVD_CGC_GATE__MPRD_MASK macro
Dvcn_3_0_0_sh_mask.h2633 #define UVD_CGC_GATE__MPRD_MASK macro
Dvcn_4_0_0_sh_mask.h68 #define UVD_CGC_GATE__MPRD_MASK macro