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Searched refs:TX1_A (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/staging/rtl8723bs/hal/
DHalPhyRf_8723B.c1016 u32 Oldval_1, X, TX1_A, reg; in _PHY_PathBFillIQKMatrix8723B() local
1032 TX1_A = (X * Oldval_1) >> 8; in _PHY_PathBFillIQKMatrix8723B()
1034 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); in _PHY_PathBFillIQKMatrix8723B()
/linux-6.1.9/drivers/pinctrl/renesas/
Dpfc-r8a77995.c143 #define GPSR4_24 F_(TX1_A, IP12_7_4)
312 #define IP12_7_4 FM(TX1_A) FM(RTS0_N) FM(TPU0TO1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
905 PINMUX_IPSR_MSEL(IP12_7_4, TX1_A, SEL_SCIF1_0),
Dpfc-r8a77970.c195 #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, …
530 PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0),
Dpfc-r8a77980.c228 #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, …
611 PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0),
Dpfc-r8a7778.c1084 PINMUX_IPSR_GPSR(IP8_13_11, TX1_A),
1465 SCIF_PFC_DAT(scif1_data_a, TX1_A, RX1_A);
Dpfc-sh7734.c891 PINMUX_IPSR_MSEL(IP4_14_12, TX1_A, SEL_SCIF1_0),
1470 GPIO_FN(HTX0_A), GPIO_FN(TX1_A), GPIO_FN(VI0_DATA1_VI0_B1),
Dpfc-r8a77950.c203 #define GPSR5_6 F_(TX1_A, IP11_19_16)
349 #define IP11_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0…
1175 PINMUX_IPSR_MSEL(IP11_19_16, TX1_A, SEL_SCIF1_0),
Dpfc-r8a77951.c204 #define GPSR5_6 F_(TX1_A, IP12_19_16)
359 #define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0…
1221 PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0),
Dpfc-r8a7796.c209 #define GPSR5_6 F_(TX1_A, IP12_19_16)
364 #define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0…
1228 PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0),
Dpfc-r8a77965.c209 #define GPSR5_6 F_(TX1_A, IP12_19_16)
364 #define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0…
1231 PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0),
Dpfc-r8a779a0.c381 #define IP2SR1_27_24 FM(MSIOF2_SS1) FM(HTX1) FM(TX1_A) F_(0, 0) FM(DU_DB6) FM(A22) F_(0, 0) F_(0, …
908 PINMUX_IPSR_GPSR(IP2SR1_27_24, TX1_A),
Dpfc-r8a77470.c959 PINMUX_IPSR_MSEL(IP12_27_24, TX1_A, SEL_SCIF1_0),