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/linux-6.1.9/arch/x86/crypto/
Dtwofish-x86_64-asm_64.S34 #define R1 %rbx macro
206 pushq R1
215 movq (R3), R1
217 input_whitening(R1,%r11,a_offset)
221 shr $32, R1
226 encrypt_round(R0,R1,R2,R3,0);
227 encrypt_round(R2,R3,R0,R1,8);
228 encrypt_round(R0,R1,R2,R3,2*8);
229 encrypt_round(R2,R3,R0,R1,3*8);
230 encrypt_round(R0,R1,R2,R3,4*8);
[all …]
Dtwofish-i586-asm_32.S231 encrypt_round(R0,R1,R2,R3,0);
232 encrypt_round(R2,R3,R0,R1,8);
233 encrypt_round(R0,R1,R2,R3,2*8);
234 encrypt_round(R2,R3,R0,R1,3*8);
235 encrypt_round(R0,R1,R2,R3,4*8);
236 encrypt_round(R2,R3,R0,R1,5*8);
237 encrypt_round(R0,R1,R2,R3,6*8);
238 encrypt_round(R2,R3,R0,R1,7*8);
239 encrypt_round(R0,R1,R2,R3,8*8);
240 encrypt_round(R2,R3,R0,R1,9*8);
[all …]
Dpoly1305-x86_64-cryptogams.pl2208 my ($R0,$R1,$R2,$R3,$R4, $S1,$S2,$S3,$S4) = map("%zmm$_",(16..24));
2251 vmovdqu `16*1-64`($ctx),%x#$D1 # will become ... ${R1}
2262 vpermd $D1,$T2,$R1
2268 vmovdqu64 $R1,0x00(%rsp,%rax){%k2}
2269 vpsrlq \$32,$R1,$T1
2292 vpmuludq $T0,$R1,$D1 # d1 = r0'*r1
2300 vpmuludq $T1,$R1,$M2
2312 vpmuludq $T2,$R1,$M3
2324 vpmuludq $T3,$R1,$M4
2401 vpermd $R1,$M0,$R1
[all …]
Dsm3-avx-asm_64.S215 #define R1(a, b, c, d, e, f, g, h, round, widx, wtype) \ macro
374 R1(a, b, c, d, e, f, g, h, 0, 0, IW); LOAD_W_XMM_2();
375 R1(d, a, b, c, h, e, f, g, 1, 1, IW);
376 R1(c, d, a, b, g, h, e, f, 2, 2, IW);
377 R1(b, c, d, a, f, g, h, e, 3, 3, IW); LOAD_W_XMM_3();
380 R1(a, b, c, d, e, f, g, h, 4, 0, IW);
381 R1(d, a, b, c, h, e, f, g, 5, 1, IW);
382 R1(c, d, a, b, g, h, e, f, 6, 2, IW); SCHED_W_0(12, W0, W1, W2, W3, W4, W5);
383 R1(b, c, d, a, f, g, h, e, 7, 3, IW); SCHED_W_1(12, W0, W1, W2, W3, W4, W5);
386 R1(a, b, c, d, e, f, g, h, 8, 0, IW); SCHED_W_2(12, W0, W1, W2, W3, W4, W5);
[all …]
/linux-6.1.9/lib/
Dtest_bpf.c40 #define R1 BPF_REG_1 macro
491 i = __bpf_ld_imm64(insns, R1, 0x0123456789abcdefULL); in __bpf_fill_max_jmp()
505 insns[i++] = BPF_ALU32_REG(op, R0, R1); in __bpf_fill_max_jmp()
507 insns[i++] = BPF_ALU64_REG(op, R0, R1); in __bpf_fill_max_jmp()
624 insn[i++] = BPF_ALU64_REG(BPF_MOV, R1, R3); in __bpf_fill_alu_shift()
628 insn[i++] = BPF_ALU32_IMM(op, R1, imm); in __bpf_fill_alu_shift()
630 insn[i++] = BPF_ALU32_REG(op, R1, R2); in __bpf_fill_alu_shift()
640 insn[i++] = BPF_ALU64_IMM(op, R1, imm); in __bpf_fill_alu_shift()
642 insn[i++] = BPF_ALU64_REG(op, R1, R2); in __bpf_fill_alu_shift()
654 insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1); in __bpf_fill_alu_shift()
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/pinctrl/
Dmediatek,pinctrl-mt6795.yaml99 description: mt6795 pull down PUPD/R0/R1 type define value.
102 values; When pull down type is PUPD/R0/R1, adding R1R0 defines
109 description: mt6795 pull up PUPD/R0/R1 type define value.
112 values; When pull up type is PUPD/R0/R1, adding R1R0 defines
131 Pull up setings for 2 pull resistors, R0 and R1. User can
133 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
134 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
135 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
136 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
142 Pull down settings for 2 pull resistors, R0 and R1. User can
[all …]
Dmediatek,mt6797-pinctrl.yaml109 Pull up setings for 2 pull resistors, R0 and R1. User can
111 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
112 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
113 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
114 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
120 Pull down settings for 2 pull resistors, R0 and R1. User can
122 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
123 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
124 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
125 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
Dmediatek,mt6779-pinctrl.yaml118 Pull up setings for 2 pull resistors, R0 and R1. User can
120 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
121 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
122 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
123 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
129 Pull down settings for 2 pull resistors, R0 and R1. User can
131 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
132 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
133 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
134 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
Dmediatek,mt8183-pinctrl.yaml141 Pull up setings for 2 pull resistors, R0 and R1. User can
143 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
144 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
145 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
146 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
152 Pull down settings for 2 pull resistors, R0 and R1. User can
154 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
155 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
156 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
157 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
Dmediatek,mt7986-pinctrl.yaml313 Pull up setings for 2 pull resistors, R0 and R1. Valid arguments
315 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
316 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
317 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
318 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
325 Pull down setings for 2 pull resistors, R0 and R1. Valid arguments
327 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
328 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
329 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
330 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
/linux-6.1.9/arch/arm/crypto/
Dpoly1305-armv4.pl495 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9));
532 vdup.32 $R1,r3
555 vmull.u32 $D1,$R1,${R0}[1]
561 vmlal.u32 $D1,$R0,${R1}[1]
562 vmlal.u32 $D2,$R1,${R1}[1]
563 vmlal.u32 $D3,$R2,${R1}[1]
564 vmlal.u32 $D4,$R3,${R1}[1]
568 vmlal.u32 $D3,$R1,${R2}[1]
576 vmlal.u32 $D4,$R1,${R3}[1]
579 vmlal.u32 $D0,$R1,${S4}[1]
[all …]
/linux-6.1.9/tools/testing/selftests/net/
Dpmtu.sh826 tc -netns "${NS_A}" qdisc replace dev veth_A-R1 root prio
828 tc -netns "${NS_A}" filter add dev veth_A-R1 \
902 run_cmd ${ns_a} ip link set veth_A-R1 netns 1
903 run_cmd ip addr add ${prefix4}.${a_r1}.1/${veth4_mask} dev veth_A-R1
904 run_cmd ip addr add ${prefix6}:${a_r1}::1/${veth6_mask} dev veth_A-R1
905 run_cmd ip link set veth_A-R1 up
951 ip link del veth_A-R1 2>/dev/null
1027 trace "${ns_a}" veth_A-R1 "${ns_r1}" veth_R1-A \
1028 "${ns_r1}" veth_R1-B "${ns_b}" veth_B-R1 \
1043 mtu "${ns_a}" veth_A-R1 2000
[all …]
/linux-6.1.9/arch/arm64/crypto/
Dpoly1305-armv8.pl262 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
513 ld1 {$R0,$R1,$S1,$R2},[x15],#64
575 umull $ACC1,$IN23_0,${R1}[2]
589 umlal $ACC2,$IN23_1,${R1}[2]
598 umlal $ACC3,$IN23_2,${R1}[2]
607 umlal $ACC4,$IN23_3,${R1}[2]
636 umlal $ACC3,$IN01_2,${R1}[0]
658 umlal $ACC1,$IN01_0,${R1}[0]
669 umlal $ACC2,$IN01_1,${R1}[0]
680 umlal $ACC4,$IN01_3,${R1}[0]
[all …]
Dsm3-neon-core.S155 #define R1(a, b, c, d, e, f, g, h, k, K_LOAD, round, widx, wtype, IOP, iop_param) \ macro
401 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 0, 0, IW, _, 0)
402 R1(rd, ra, rb, rc, rh, re, rf, rg, k_odd, _, 1, 1, IW, _, 0)
403 R1(rc, rd, ra, rb, rg, rh, re, rf, k_even, KL, 2, 2, IW, _, 0)
404 R1(rb, rc, rd, ra, rf, rg, rh, re, k_odd, _, 3, 3, IW, _, 0)
407 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 4, 0, IW, _, 0)
408 R1(rd, ra, rb, rc, rh, re, rf, rg, k_odd, _, 5, 1, IW, _, 0)
409 R1(rc, rd, ra, rb, rg, rh, re, rf, k_even, KL, 6, 2, IW, SCHED_W_W0W1W2W3W4W5_1, 12)
410 R1(rb, rc, rd, ra, rf, rg, rh, re, k_odd, _, 7, 3, IW, SCHED_W_W0W1W2W3W4W5_2, 12)
413 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 8, 0, IW, SCHED_W_W0W1W2W3W4W5_3, 12)
[all …]
/linux-6.1.9/arch/hexagon/kernel/
Dvm_entry.S207 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
214 memd(R29 + #_PT_ER_VMEL) = R1:0; \
216 R1.L = #LO(CHandler); \
220 R1.H = #HI(CHandler); \
230 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
239 R1:0 = G1:0; \
241 memd(R29 + #_PT_ER_VMEL) = R1:0; \
242 R1 = # ## #(CHandler); \
302 R1 = memw(THREADINFO_REG + #_THREAD_INFO_FLAGS); define
321 R1:0 = memd(R29 + #_PT_ER_VMEL);
[all …]
Dvm_switch.S58 R29 = memw(R1 + #(_TASK_STRUCT_THREAD + _THREAD_STRUCT_SWITCH_SP));
75 THREADINFO_REG = memw(R1 + #_TASK_THREAD_INFO);
/linux-6.1.9/crypto/
Dsm3.c49 #define R1(a, b, c, d, e, f, g, h, t, w1, w2) \ macro
85 R1(a, b, c, d, e, f, g, h, K[0], I(0), I(4)); in sm3_transform()
86 R1(d, a, b, c, h, e, f, g, K[1], I(1), I(5)); in sm3_transform()
87 R1(c, d, a, b, g, h, e, f, K[2], I(2), I(6)); in sm3_transform()
88 R1(b, c, d, a, f, g, h, e, K[3], I(3), I(7)); in sm3_transform()
89 R1(a, b, c, d, e, f, g, h, K[4], W1(4), I(8)); in sm3_transform()
90 R1(d, a, b, c, h, e, f, g, K[5], W1(5), I(9)); in sm3_transform()
91 R1(c, d, a, b, g, h, e, f, K[6], W1(6), I(10)); in sm3_transform()
92 R1(b, c, d, a, f, g, h, e, K[7], W1(7), I(11)); in sm3_transform()
93 R1(a, b, c, d, e, f, g, h, K[8], W1(8), I(12)); in sm3_transform()
[all …]
/linux-6.1.9/arch/sparc/net/
Dbpf_jit_comp_32.c261 #define emit_cmp(R1, R2) \ argument
262 *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
264 #define emit_cmpi(R1, IMM) \ argument
265 *prog++ = (SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
267 #define emit_btst(R1, R2) \ argument
268 *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
270 #define emit_btsti(R1, IMM) \ argument
271 *prog++ = (ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
273 #define emit_sub(R1, R2, R3) \ argument
274 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/regulator/
Drohm,bd71837-regulator.yaml126 # R1
132 # Vout_o = Vo - (Vpu - Vo)*R2/R1
133 # Linear_step = step_orig*(R1+R2)/R1
139 # R1 and R2 are resistor values.
144 the used pull-up voltage before R1.
149 the used R1 resistor.
Drohm,bd71847-regulator.yaml121 # R1
127 # Vout_o = Vo - (Vpu - Vo)*R2/R1
128 # Linear_step = step_orig*(R1+R2)/R1
134 # R1 and R2 are resistor values.
139 the used pull-up voltage before R1.
144 the used R1 resistor.
Dltc3676.txt18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.4125 * (1 + R1/R2) V and 0.8 * (1 + R1/R2) V.
25 0.725 * (1 + R1/R2) V. The ldo3 regulator is fixed to 1.8 V. The ldo1 standby
Dltc3589.txt18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
23 have a fixed 0.8 V reference and thus output 0.8 * (1 + R1/R2) V. The ldo3
/linux-6.1.9/Documentation/gpu/amdgpu/
Dapu-asic-info-table.csv3 Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN/PICASSO, DCN 1.0, 9.1.0,…
5 Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN2, DCN 1.0, 9.2.2, VCN 1.…
/linux-6.1.9/Documentation/bpf/
Dclassic_vs_extended.rst65 place function arguments into R1 to R5 registers to satisfy calling
67 to in-kernel function. If R1 - R5 registers are mapped to CPU registers
74 After an in-kernel function call, R1 - R5 are reset to unreadable and R0 has
98 bpf_mov R2, R1
99 bpf_add R1, 1
108 already placed into R1 (e.g. on __bpf_prog_run() startup) and the programs
119 R1 - rdi
135 bpf_mov R6, R1 /* save ctx */
142 bpf_mov R1, R6 /* restore ctx for next call */
193 bpf_mov R1, 1
[all …]
/linux-6.1.9/tools/perf/arch/arm/tests/
Dregs_load.S5 #define R1 0x08 macro
42 str r1, [r0, #R1]

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