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Searched refs:PPLL_POST3_DIV_MASK (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/include/video/
Daty128.h270 #define PPLL_POST3_DIV_MASK 0x70000 macro
Dradeon.h995 #define PPLL_POST3_DIV_MASK 0x00070000 macro
/linux-6.1.9/drivers/video/fbdev/aty/
Dradeon_base.c1364 (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) { in radeon_write_pll_regs()
1413 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()
Daty128fb.c1344 div3 &= ~PPLL_POST3_DIV_MASK; in aty128_set_pll()