Searched refs:PORT_PLL_P2_MASK (Results 1 – 3 of 3) sorted by relevance
1946 temp &= ~(PORT_PLL_P1_MASK | PORT_PLL_P2_MASK); in bxt_ddi_pll_enable()2082 hw_state->ebb0 &= PORT_PLL_P1_MASK | PORT_PLL_P2_MASK; in bxt_ddi_pll_get_hw_state()2268 clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK, pll_state->ebb0); in bxt_ddi_pll_get_freq()
658 #define PORT_PLL_P2_MASK REG_GENMASK(12, 8) macro659 #define PORT_PLL_P2(p2) REG_FIELD_PREP(PORT_PLL_P2_MASK, (p2))
574 clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK, in bxt_vgpu_get_dp_bitrate()