Searched refs:PLLD_BASE (Results 1 – 5 of 5) sorted by relevance
/linux-6.1.9/drivers/clk/tegra/ |
D | clk-tegra124.c | 50 #define PLLD_BASE 0xd0 macro 627 .base_reg = PLLD_BASE, 1500 plld_base = readl(clk_base + PLLD_BASE); in tegra124_132_clock_init_pre() 1502 writel(plld_base, clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
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D | clk-tegra210.c | 71 #define PLLD_BASE 0xd0 macro 647 csi_src = readl_relaxed(clk_base + PLLD_BASE); in tegra210_venc_mbist_war() 648 writel_relaxed(csi_src | PLLD_BASE_CSI_CLKSOURCE, clk_base + PLLD_BASE); in tegra210_venc_mbist_war() 659 writel_relaxed(csi_src, clk_base + PLLD_BASE); in tegra210_venc_mbist_war() 2167 .base_reg = PLLD_BASE, 3132 CLK_SET_RATE_PARENT, clk_base + PLLD_BASE, in tegra210_periph_clk_init() 3798 value = readl(clk_base + PLLD_BASE); in tegra210_clock_init() 3800 writel(value, clk_base + PLLD_BASE); in tegra210_clock_init()
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D | clk-tegra114.c | 65 #define PLLD_BASE 0xd0 macro 412 .base_reg = PLLD_BASE, 1030 clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock); in tegra114_periph_clk_init()
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D | clk-tegra20.c | 57 #define PLLD_BASE 0xd0 macro 351 .base_reg = PLLD_BASE,
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D | clk-tegra30.c | 66 #define PLLD_BASE 0xd0 macro 445 .base_reg = PLLD_BASE,
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