/linux-6.1.9/drivers/pinctrl/cirrus/ |
D | pinctrl-lochnagar.c | 441 LN_FUNC(lochnagar##REV##_##ID##_pin.name, PIN, OP) 454 LN_FUNC(lochnagar2_##ID##_BCLK_pin.name, PIN, BOP), \ 455 LN_FUNC(lochnagar2_##ID##_LRCLK_pin.name, PIN, LROP), \ 456 LN_FUNC(lochnagar2_##ID##_RXDAT_pin.name, PIN, RXOP), \ 457 LN_FUNC(lochnagar2_##ID##_TXDAT_pin.name, PIN, TXOP) 474 LN_FUNC("dsp-gpio1", PIN, 0x01), 475 LN_FUNC("dsp-gpio2", PIN, 0x02), 476 LN_FUNC("dsp-gpio3", PIN, 0x03), 477 LN_FUNC("codec-gpio1", PIN, 0x04), 478 LN_FUNC("codec-gpio2", PIN, 0x05), [all …]
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/linux-6.1.9/arch/arm/boot/dts/ |
D | am335x-pocketbeagle.dts | 216 /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */ 225 /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */ 234 /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */ 243 /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */ 252 /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */ 261 /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */ 270 /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */ 279 /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */ 288 /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */ 297 /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */ [all …]
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/linux-6.1.9/Documentation/devicetree/bindings/pinctrl/ |
D | fsl,imx27-pinctrl.txt | 10 setting. The format is fsl,pins = <PIN MUX_ID CONFIG>. 12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable 13 configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin 90 For convenience there are macros defined in imx27-pinfunc.h which provide PIN
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D | qcom,msm8226-pinctrl.yaml | 31 description: Specifies the PIN numbers and Flags, as defined in 48 #PIN CONFIGURATION NODES
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D | qcom,ipq6018-pinctrl.yaml | 31 Specifies the PIN numbers and Flags, as defined in defined in 45 #PIN CONFIGURATION NODES
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D | qcom,sm8250-pinctrl.yaml | 38 Specifies the PIN numbers and Flags, as defined in defined in 54 #PIN CONFIGURATION NODES
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D | renesas,rzn1-pinctrl.yaml | 67 (PIN | MUX_FUNC << 8) 68 where PIN directly corresponds to the pl_gpio pin number and
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D | qcom,qcm2290-pinctrl.yaml | 31 Specifies the PIN numbers and Flags, as defined in defined in 47 #PIN CONFIGURATION NODES
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D | qcom,sc7280-pinctrl.yaml | 31 Specifies the PIN numbers and Flags, as defined in defined in 50 #PIN CONFIGURATION NODES
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D | qcom,sdx55-pinctrl.yaml | 31 description: Specifies the PIN numbers and Flags, as defined in 48 #PIN CONFIGURATION NODES
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D | qcom,sm6115-pinctrl.yaml | 38 Specifies the PIN numbers and Flags, as defined in defined in 56 #PIN CONFIGURATION NODES
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D | qcom,msm8953-pinctrl.yaml | 31 Specifies the PIN numbers and Flags, as defined in defined in 47 #PIN CONFIGURATION NODES
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D | qcom,sdx65-pinctrl.yaml | 29 description: Specifies the PIN numbers and Flags, as defined in 46 #PIN CONFIGURATION NODES
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D | qcom,tlmm-common.yaml | 26 Specifies the PIN numbers and Flags, as defined in defined in
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D | qcom,sc7280-lpass-lpi-pinctrl.yaml | 40 #PIN CONFIGURATION NODES
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D | qcom,sm8250-lpass-lpi-pinctrl.yaml | 45 #PIN CONFIGURATION NODES
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D | qcom,sm8450-lpass-lpi-pinctrl.yaml | 46 #PIN CONFIGURATION NODES
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D | qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 46 #PIN CONFIGURATION NODES
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/linux-6.1.9/Documentation/devicetree/bindings/gpio/ |
D | gpio-mxs.yaml | 14 The Freescale MXS GPIO controller is part of MXS PIN controller. 16 As the GPIO controller is embedded in the PIN controller and all the 17 GPIO ports share the same IO space with PIN controller, the GPIO node
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/linux-6.1.9/tools/testing/selftests/bpf/prog_tests/ |
D | tc_redirect.c | 507 #define PIN(__prog) ({ \ in netns_load_dtime_bpf() macro 517 PIN(egress_host); in netns_load_dtime_bpf() 518 PIN(ingress_host); in netns_load_dtime_bpf() 530 PIN(egress_host); in netns_load_dtime_bpf() 531 PIN(ingress_host); in netns_load_dtime_bpf() 543 PIN(ingress_fwdns_prio100); in netns_load_dtime_bpf() 544 PIN(egress_fwdns_prio100); in netns_load_dtime_bpf() 545 PIN(ingress_fwdns_prio101); in netns_load_dtime_bpf() 546 PIN(egress_fwdns_prio101); in netns_load_dtime_bpf() 567 #undef PIN in netns_load_dtime_bpf()
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/linux-6.1.9/Documentation/userspace-api/media/cec/ |
D | cec-ioc-dqevent.rst | 153 * .. _`CEC-EVENT-PIN-CEC-LOW`: 160 * .. _`CEC-EVENT-PIN-CEC-HIGH`: 167 * .. _`CEC-EVENT-PIN-HPD-LOW`: 176 * .. _`CEC-EVENT-PIN-HPD-HIGH`: 185 * .. _`CEC-EVENT-PIN-5V-LOW`: 194 * .. _`CEC-EVENT-PIN-5V-HIGH`:
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/linux-6.1.9/Documentation/arm/samsung-s3c24xx/ |
D | gpio.rst | 94 PIN Numbers 150 Getting and setting the state of a PIN 157 Getting the IRQ number associated with a PIN
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/linux-6.1.9/Documentation/arm/samsung/ |
D | gpio.rst | 30 PIN configuration
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/linux-6.1.9/arch/arm64/boot/dts/hisilicon/ |
D | hikey970-pmic.dtsi | 38 ldo4: ldo4 { /* 40 PIN */
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/linux-6.1.9/arch/arm64/boot/dts/exynos/ |
D | exynos5433-pinctrl.dtsi | 14 #define PIN(_pin, _func, _pull, _drv) \ macro 23 PIN(_pin, INPUT, _pull, _drv) 26 PIN(_pin, OUTPUT, _pull, _drv) 29 PIN(_pin, 2, _pull, _drv)
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