Searched refs:PHYCSYMCLK_CLOCK_CNTL (Results 1 – 7 of 7) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dccg.h | 36 SR(PHYCSYMCLK_CLOCK_CNTL) 47 SR(PHYCSYMCLK_CLOCK_CNTL) 57 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\ 58 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh) 66 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\ 67 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/ |
D | dcn32_dccg.h | 44 SR(PHYCSYMCLK_CLOCK_CNTL),\ 87 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\ 88 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
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D | dcn32_resource.h | 1258 SR(PHYCSYMCLK_CLOCK_CNTL), SR(PHYDSYMCLK_CLOCK_CNTL), \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/ |
D | dcn314_dccg.h | 45 SR(PHYCSYMCLK_CLOCK_CNTL),\ 171 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\ 172 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_dccg.h | 39 SR(PHYCSYMCLK_CLOCK_CNTL),\ 85 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\ 86 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
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D | dcn31_dccg.c | 459 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk() 466 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dccg.h | 258 uint32_t PHYCSYMCLK_CLOCK_CNTL; member
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