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Searched refs:PHYCSYMCLK_CLOCK_CNTL (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dccg.h36 SR(PHYCSYMCLK_CLOCK_CNTL)
47 SR(PHYCSYMCLK_CLOCK_CNTL)
57 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
58 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh)
66 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
67 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dccg.h44 SR(PHYCSYMCLK_CLOCK_CNTL),\
87 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
88 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
Ddcn32_resource.h1258 SR(PHYCSYMCLK_CLOCK_CNTL), SR(PHYDSYMCLK_CLOCK_CNTL), \
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_dccg.h45 SR(PHYCSYMCLK_CLOCK_CNTL),\
171 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
172 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.h39 SR(PHYCSYMCLK_CLOCK_CNTL),\
85 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
86 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
Ddcn31_dccg.c459 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
466 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.h258 uint32_t PHYCSYMCLK_CLOCK_CNTL; member